Changes

AArch64: Improve arraycopy inlining

This commit improves the inlined code of arraycopy for AArch64, by
using ldp/stp instructions with a pair of SIMD registers, which can
load/store 32 bytes at a time.

Signed-off-by: KONNO Kazuhiro <konno@jp.ibm.com>
 (commit: 84de48b)