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Build #24 (Jan 5, 2022, 11:29:14 AM)

Changes
  1. CMake: update DIA registry search handling (commit: 0fce6b3) (details / githubweb)
  2. Explicitly specify target in Compilation constructor (commit: d0e0cc1) (details / githubweb)
  3. Added documentation for omrsock API (commit: 349d9e7) (details / githubweb)
  4. Bump ALS on Z to z10 (commit: 0403004) (details / githubweb)
  5. CMake: Fix typo in FindDiaSDK (commit: 64146b0) (details / githubweb)
  6. CMake: Fix msvc library detection for RelWithDebInfo (commit: 9916427) (details / githubweb)
  7. Switch the Power minimumALS to use OMRProcessorArchitecture (commit: 958b49d) (details / githubweb)
  8. Fix compiler tests causing lots of warnings (commit: 0f7c8c3) (details / githubweb)
  9. Merge Shared Memory Routines from OpenJ9 to OMR (commit: 4db59eb) (details / githubweb)
  10. AArch64: Fix order of calls to maintain the proper live state of registers (commit: 91e5571) (details / githubweb)
  11. AArch64: Add a method to kill temporary registers added to register dependency (commit: 2120888) (details / githubweb)
  12. Fixes in RegDepCopyRemoval for postGRA block splitter (commit: 104d2c3) (details / githubweb)
  13. Handle PassThrough in ILChildValidator (commit: e2bb845) (details / githubweb)
  14. Fix x gprClobberEvaluate to ensure correct gc flags are set on new register (commit: 1a59d02) (details / githubweb)
  15. Fix x iselectEvaluator to ensure correct gc flags are set on result register (commit: c0843bb) (details / githubweb)
  16. Fix z selectEvaluator to ensure correct gc flags are set on result register (commit: a2b3d90) (details / githubweb)
  17. Fix aarch64 iselectEvaluator to ensure correct gc flags are set on result register (commit: 880d959) (details / githubweb)
  18. Fix riscv gprClobberEvaluate to ensure correct gc flags are set on new register (commit: f3c4501) (details / githubweb)
  19. Fix riscv iselectEvaluator to ensure correct gc flags are set on result register (commit: da1333e) (details / githubweb)
  20. Improve the Tril tests for select opcodes (commit: 58d2d97) (details / githubweb)
  21. Skip iselect + bcmp* and scmp* tests on Z (commit: 0987b88) (details / githubweb)
  22. Skip iselect + bcmp* and scmp* tests on x86 (commit: d1a2969) (details / githubweb)
  23. Fix spelling of is16BitUnsignedImmediate function (commit: f0d0291) (details / githubweb)
  24. Implement a helper to evaluate a node to a condition register (commit: 5ed32ed) (details / githubweb)
  25. Remove the concept of flipped CCRs from the Power codegen (commit: 8ed69bc) (details / githubweb)
  26. Refactor the Power select evaluators (commit: 2f1baf8) (details / githubweb)
  27. Remove the iselect control flow instruction (commit: bcd8e57) (details / githubweb)
  28. Implement isel exploitation in the select evaluators (commit: 2b9283e) (details / githubweb)
  29. Add internal pointer assert to Power select evaluator (commit: bc037b1) (details / githubweb)
  30. Deprecate uses of getSupportsArch in Z codegen (commit: f09371b) (details / githubweb)
  31. Use Snippet to load methodPointer in remote compile (commit: a42b150) (details / githubweb)
  32. Restrict LARL-use in genLoadAddressConstant (commit: e855952) (details / githubweb)
  33. AArch64: Fix memory reference to kill registers properly (commit: 7c33de9) (details / githubweb)
  34. AArch64: Implement Register Association (commit: 50b3ca6) (details / githubweb)
  35. AArch64: Enhance findBestFreeRegister to use register associations (commit: 512a817) (details / githubweb)
  36. AArch64: Enhance freeBestRegister to use register associations (commit: 82b1571) (details / githubweb)
  37. Add missing parentheses in macro definition (commit: acc04ee) (details / githubweb)
  38. Relocate additions for omrshmem at the end of the file (commit: 36afd32) (details / githubweb)
  39. CMake: Add omrsig to omr_ddrgen rpath on aix (commit: 09eadc3) (details / githubweb)
  40. Stop referencing TOCBaseRegister on POWER10 (commit: b3cfdbd) (details / githubweb)
  41. AArch64: Add real register mask (commit: 9cd45bd) (details / githubweb)
  42. AArch64: Change Register Assigner to use live register information (commit: 55ce666) (details / githubweb)
  43. AArch64: Enable Live Registers (commit: f6b166d) (details / githubweb)
  44. AArch64: Implement regMaskToRealRegister method (commit: a6c8e63) (details / githubweb)
  45. RISC-V: implement fcmpl, fcmpg, dcmpl and dcmpg (commit: 53036d4) (details / githubweb)
  46. AArch64: Change register dependency to set up live register information (commit: 75c550b) (details / githubweb)
  47. AArch64: Fix memory reference for indirect load of const node (commit: 5c60338) (details / githubweb)
  48. AArch64: Use placeholder registers (commit: 172ab80) (details / githubweb)
  49. Expand Dispatcher Wait Loop Exit Assert (commit: 44e34fe) (details / githubweb)
  50. CMake: Add support for cygwin paths when using msvc (commit: b9dc916) (details / githubweb)
  51. Add static MemoryReference creation helpers (commit: 2554ffc) (details / githubweb)
  52. Add popfd and pushfd opcode (commit: 6f96390) (details / githubweb)
  53. Add a function to break on DF set (commit: 5ba456b) (details / githubweb)
  54. Add default TR_ASSERTs to enum switch statements (commit: d1e6b9e) (details / githubweb)
  55. Replace MemoryReference constructors with static helpers (commit: a4fae6c) (details / githubweb)
  56. Remove and replace legacy MemoryReference constructor (commit: d82b6ef) (details / githubweb)
  57. Change MemoryReference constructors from public to private/protected (commit: 48c3e0b) (details / githubweb)
  58. Remove old processor detection code (commit: dccbaf2) (details / githubweb)
  59. Remove Unsafe.copyMemory transformation from OMR (commit: c981d5c) (details / githubweb)
  60. Add sbyteswap and lbyteswap to opcode tables (commit: cbacb9a) (details / githubweb)
  61. Add a flag to indicate codegen support for byteswaps (commit: 6df85c1) (details / githubweb)
  62. Remove the old getSupportsIbyteswap() query (commit: 7d68a30) (details / githubweb)
  63. Implement sbyteswap and lbyteswap on Power (commit: 8e2a3a7) (details / githubweb)
  64. Implement sbyteswap and lbyteswap on x (commit: 9cff620) (details / githubweb)
  65. Implement the byteswap opcodes on Z (commit: f5e75be) (details / githubweb)
  66. Add byteswap Tril tests (commit: c58cb61) (details / githubweb)
  67. Remove unneeded asserts from byteswap evaluators (commit: 338560d) (details / githubweb)
  68. Remove old processor detection code on Power (commit: 47803ad) (details / githubweb)
  69. Initialize RX Compilation setting before CodeGenerator construction (commit: e3d1611) (details / githubweb)
  70. Check whether TLS storage for comp object was created before freeing it (commit: 98c6c84) (details / githubweb)
  71. Add Dynamic Breadth First Scan Ordering to the GC (commit: 66a8c67) (details / githubweb)
  72. Remove X86VFPCallCleanupInstruction assignRegister assert (commit: a7279e1) (details / githubweb)
  73. RISC-V: fix compilation error introduced by f3c45015f6 (commit: 9a5314e) (details / githubweb)
  74. Disable recomp in read only code cache (commit: 94f7e54) (details / githubweb)
  75. Calls to labels do not require trampolines (commit: 2884fd7) (details / githubweb)
  76. Disable side-effect guards under read only code cache (commit: 3836308) (details / githubweb)
  77. Simplify the Power ZEROCHK evaluator (commit: 7f0cab9) (details / githubweb)
  78. Remove cmp2branch (commit: 43d52a2) (details / githubweb)
  79. CMake: Fix omr_ddrgen on aix (commit: 2583849) (details / githubweb)
  80. Add Language Specific Changes for Dynamic BF Scan Ordering (commit: 4d754a8) (details / githubweb)
  81. Introduce RX code address inquiry functions (commit: 1421fca) (details / githubweb)
  82. Remove deprecated code from StoreSinking (commit: d5e632a) (details / githubweb)
  83. Add pointer to owning metadata in sentinel assumption (commit: 90b975b) (details / githubweb)
  84. Add serialize and size APIs (commit: de88e26) (details / githubweb)
  85. Add missing param to serialize API (commit: 5b469e2) (details / githubweb)
  86. Replace uses of TR::comp() with cheaper alternatives (commit: 050212c) (details / githubweb)
  87. AArch64: Implement byteswap evaluators (commit: 297d346) (details / githubweb)
  88. Rename x86 CodeGenerator 'initialize' function to 'initializeX86' (commit: e537f3b) (details / githubweb)
  89. Remove unused helpers from Helpers.inc (commit: 4f52ab9) (details / githubweb)
  90. Introduce CodeGenerator constructors and initialize functions (commit: 4e028e2) (details / githubweb)
  91. Add default TR::CodeGenerator constructor (commit: ef7b263) (details / githubweb)
  92. Remove JitBuilder CodeGenerator implementation (commit: ea17655) (details / githubweb)
  93. Remove TestCompiler CodeGenerator implementation (commit: db42a87) (details / githubweb)
  94. Fix the ASSERT in RegDepCopyRemoval (commit: 7aacdcb) (details / githubweb)
  95. Print s390 processor feature name (commit: 56a6005) (details / githubweb)
  96. Unify LinkageInfo word initialization (commit: 4d6adde) (details / githubweb)
  97. Add and use CodeGenerator factory function (commit: 82578df) (details / githubweb)
  98. CMake: call $(MAKE) for ddr on makefile generators (commit: 8e70a97) (details / githubweb)
  99. Adding `stalltimems` in `gc-end` stanza (commit: 700b324) (details / githubweb)
  100. Support Int64 Length Node within setmemoryEvaluator (commit: 791eac8) (details / githubweb)
  101. Flip default setting of isExternalRelocation (commit: 716129e) (details / githubweb)
  102. Print ppc processor feature name (commit: 14deb9f) (details / githubweb)
  103. AArch64: Add support for tbz/tbnz instructions (commit: 30c13bc) (details / githubweb)
  104. Add j9VMThreadTempSlotField symbol in Symbol Reference Table (commit: 7d72e3f) (details / githubweb)
  105. AArch64: Add another method to kill temporary registers added to register dependency (commit: 9452f8e) (details / githubweb)
  106. Fix compile error in RISC-V OMRCodeGenerator.hpp (commit: f9a71c7) (details / githubweb)
  107. Use Compilation API for asking if recursive method target (commit: 4535ff3) (details / githubweb)
  108. Provide System linkage implementations of entry point APIs (commit: 1cfbdb8) (details / githubweb)
  109. Use entryPointFromCompiledMethod linkage API for RISC-V recursive calls (commit: 24167be) (details / githubweb)
  110. Remove deprecated codegen Relocations (commit: 2754a7c) (details / githubweb)
  111. Remove deprecated code from Relocation.hpp (commit: 06657b9) (details / githubweb)
  112. Make findOrCreateRuntimeHelper boolean parms default to false (commit: adc8deb) (details / githubweb)
  113. Replace references to findOrCreateRuntimeHelper on Power (commit: e5a62de) (details / githubweb)
  114. Replace references to findOrCreateRuntimeHelper on Z (commit: 2c37bab) (details / githubweb)
  115. Replace references to findOrCreateRuntimeHelper on X86 (commit: a7d6c1a) (details / githubweb)
  116. Replace references to findOrCreateRuntimeHelper on ARM (commit: a64551a) (details / githubweb)
  117. Prevent cfg simplification from transforming stores of internal pointers (commit: 61757b9) (details / githubweb)
  118. Remove unused JVMPI options (commit: 22dafe1) (details / githubweb)
  119. AArch64: Fix debug print for tst instruction (commit: 3dbf385) (details / githubweb)
  120. Remove unused Machine class functionality (commit: 5fa4d6d) (details / githubweb)
  121. Clear array split stats (commit: 98f94bd) (details / githubweb)
  122. Fix missing verbose log acquire and release (commit: 8e4bdfc) (details / githubweb)
  123. AArch64: Change ConstantDataSnippet to use targetaddress2 for non-aconst node (commit: fdded35) (details / githubweb)
  124. Rename CodeGenerator disableFpGRA to disableFloatingPointGRA (commit: cd753ab) (details / githubweb)
  125. Disable x87 floating point GRA (commit: 89a6afe) (details / githubweb)
  126. CMake: Update langlvl on aix (commit: 1e2f01e) (details / githubweb)
  127. Use entryPointFromCompiledMethod linkage API for recursive calls (commit: f9df260) (details / githubweb)
  128. Avoid null dereference in inliner due to BCD (commit: c2df848) (details / githubweb)
  129. Remove reverse load/store opcodes (commit: ba239bc) (details / githubweb)
  130. Compile twice for DDR on z/OS so optimization is not hindered (commit: 35961cb) (details / githubweb)
  131. Reorder J9MemorySegment constants from low to high value (commit: 7696eee) (details / githubweb)
  132. Remove code related to invokeWithArgumentsHelper (commit: c05bb39) (details / githubweb)
  133. Define OpenJ9-specific HandleRecompilationOps optimization (commit: 3af3a37) (details / githubweb)
  134. Windows: Fix copyright strings in shared libraries (commit: 6584440) (details / githubweb)
  135. Add double map API for OSX (commit: 5b3b915) (details / githubweb)
  136. Add OMR::align() + unit test (commit: 9fe6b2b) (details / githubweb)
  137. Add CCData to OMR compiler (commit: 392e0d3) (details / githubweb)
  138. Remove deprecated Power register liveness code (commit: 2742fe3) (details / githubweb)
  139. Replacing isAbstractClass() and isInterfaceClass() with isConcreteClass() (commit: 50d4fc1) (details / githubweb)
  140. AArch64: Fix TestBitBranch instruction (commit: 7640bd8) (details / githubweb)
  141. Fix byteswapped store optimization on Power (commit: e93399a) (details / githubweb)
  142. Add API to get the sentinel Runtime Assumpion associated with the current Runtime Assumption (commit: 45abc43) (details / githubweb)
  143. RISC-V: rename TreeEvaluatorTable.hpp (part 1/2) (commit: e667023) (details / githubweb)
  144. RISC-V: rename TreeEvaluatorTable.hpp (part 2/2) (commit: d178e16) (details / githubweb)
  145. Fix the badIlOp node generated by RegDepCopyRemoval (commit: a19ea6a) (details / githubweb)
  146. Remove unneeded content from FrontEnd.hpp (commit: 29ccc32) (details / githubweb)
  147. Fix assert when encoding stdbrx (commit: 6fddaab) (details / githubweb)
  148. Disable byteswap support on x86 until issues are resolved (commit: 518e46d) (details / githubweb)
  149. Make PortSockTest::poll_functionality_many_sockets more robust (commit: 2f398ea) (details / githubweb)
  150. Remove default CodeGenerator constructor (commit: e7f47df) (details / githubweb)
  151. Fix lbyteswap store optimization on ppc32 (commit: 9b282a1) (details / githubweb)
  152. Implement omrcpu_flush_icache() for ARM and AArch64 (commit: 9132a93) (details / githubweb)
  153. Fix invalid use of stdbrx on P6 and before (commit: b022576) (details / githubweb)
  154. Remove opcode entries (commit: 5e8c9c4) (details / githubweb)
  155. Expand macros in il/OMRILOpCodeProperties (commit: 8237568) (details / githubweb)
  156. Ignore tags files (commit: d393d26) (details / githubweb)
  157. Update OMROpcodes header file (commit: d381470) (details / githubweb)
  158. Add values from OMRILOpCodesEnum (commit: 851cc2a) (details / githubweb)
  159. Adjust OMRILOpCodeProperties macro invocation (commit: 3ba16ad) (details / githubweb)
  160. Add last Prefetch opcode (commit: 2f80287) (details / githubweb)
  161. Change OMRILOpCodesEnum to use macro invocation (commit: bf70d58) (details / githubweb)
  162. Update OMROpcodes.hpp (commit: 8de20bc) (details / githubweb)
  163. Refactor OMRSimplifierTableEnum.hpp (commit: 0c9d6c9) (details / githubweb)
  164. Refactor ValuePropagationTable.hpp (commit: fdd14b9) (details / githubweb)
  165. Canonicalize opcode simplifier handlers (commit: 8411d43) (details / githubweb)
  166. Canonicalize opcodes and VP handlers (commit: 5fbf6f6) (details / githubweb)
  167. Remove VP and Simplifier tokens (commit: aad62a0) (details / githubweb)
  168. Refactor Simplifier and Value Propagation (commit: 54c783e) (details / githubweb)
  169. Add OMROpcodes header in VP (commit: dbd2e28) (details / githubweb)
  170. Refactor i386 TreeEvaluatorTable (commit: 335f381) (details / githubweb)
  171. Add X86 suffix for macro names (commit: 747867e) (details / githubweb)
  172. Refactor amd64 TreeEvaluatorTable (commit: 0623360) (details / githubweb)
  173. Refactor aarch64 TreeEvaluatorTable (commit: 0554594) (details / githubweb)
  174. Refactor p TreeEvaluatorTable (commit: 4da6b27) (details / githubweb)
  175. Refactor z TreeEvaluatorTable (commit: b0eaa27) (details / githubweb)
  176. Refactor arm TreeEvaluatorTable (commit: bafce7c) (details / githubweb)
  177. Adjust aarch64 Tree Evaluator table (commit: bd6fed4) (details / githubweb)
  178. Adjust ARM architecture TreeEvaluator table (commit: 0f036dd) (details / githubweb)
  179. Resolve merge conflict (commit: fef86e9) (details / githubweb)
  180. Remove deprecated unsigned opcodes (commit: 08ba8de) (details / githubweb)
  181. Remove deprecated set of opcodes (commit: 5e61b6c) (details / githubweb)
  182. Remove deprecated opcodes TR::iucall / TR::iucalli (commit: 6df8d1d) (details / githubweb)
  183. Add opcodes sbyteswap and lbyteswap (commit: f6e63fe) (details / githubweb)
  184. Refactor RISC-V TreeEvaluatorTable (commit: aca3de2) (details / githubweb)
  185. Fix the BadILOp in some files to prevent errors (commit: ab8b8fe) (details / githubweb)
  186. Fix the macro mapping for byteswap tree evaluators (commit: d3ac3cb) (details / githubweb)
  187. Remove redundant macro tree eval guards in ARM (commit: 2e111f8) (details / githubweb)
  188. Fix tree evaluator macro mapping in Power (commit: 4aea73c) (details / githubweb)
  189. Fix the incorrect mapping in Power Tree Evaluator (commit: e51ee6f) (details / githubweb)
  190. Fix fselect and dselect macro mapping in Tree Eval (commit: 1c29eae) (details / githubweb)
  191. Remap dselect to fselect as dselect does not exist (commit: 9cafff7) (details / githubweb)
  192. Remove aarch64 name from macro definition (commit: df72e25) (details / githubweb)
  193. Rename opcode macros to be consistent across archs (commit: ccaa9c7) (details / githubweb)
  194. Expand SIGNED and UNSIGN in Z TreeEvaluatorTable (commit: bd6b701) (details / githubweb)
  195. Rename RISC-V TreeEvaluatorTable file (commit: 91d90b2) (details / githubweb)
  196. Remove redundant comments from OMROpcodes (commit: d470e96) (details / githubweb)
  197. Add linter job to Azure Pipeline (commit: 841d9b7) (details / githubweb)
  198. Deprecate Travis CI (commit: e5211a3) (details / githubweb)
  199. Refresh Azure ccache (commit: f9621f4) (details / githubweb)
  200. Remove reverse load and store opcodes from ValuePropagationTable.hpp (commit: 33bd893) (details / githubweb)
  201. Fix naming and structure of RegisterDependencyStruct extensible class (commit: de011bc) (details / githubweb)
  202. Common RealRegister field in RegisterDependencyStruct (commit: ab9c853) (details / githubweb)
  203. Introduce common meaningful queries for NoReg and SpilledReg property checks (commit: 17aad65) (details / githubweb)
  204. Replace reg dep RealRegister property checks with meaningful queries on x86 (commit: fd4efc6) (details / githubweb)
  205. Replace reg dep RealRegister property checks with meaningful queries on Power (commit: 55eb634) (details / githubweb)
  206. Replace reg dep RealRegister property checks with meaningful queries on AArch64 (commit: 1e7bc32) (details / githubweb)
  207. Replace reg dep RealRegister property checks with meaningful queries on RISC-V (commit: b54a622) (details / githubweb)
  208. Replace TR_ARMRegisterDependency with TR::RegisterDependency (commit: e866e3c) (details / githubweb)
  209. Replace reg dep RealRegister property checks with meaningful queries on ARM (commit: 6af1a09) (details / githubweb)
  210. Modify some Z RegisterDependencyConditions APIs to accept a TR::RegisterDependency (commit: 89680ab) (details / githubweb)
  211. Replace reg dep RealRegister property checks with meaningful queries on Z (commit: 912dca5) (details / githubweb)
  212. CMake: Enable support for ddr on zos (commit: 696ac44) (details / githubweb)
  213. Exclude CCDataTest.cpp on MSVC and XL C/C++ (commit: 4e066a5) (details / githubweb)
  214. Add alignof wrapper for old compilers. (commit: c798177) (details / githubweb)
  215. Remove C++11-isms that old compilers don't support (commit: 9c7a093) (details / githubweb)
  216. Rename variable that clashes with ZOS stdlib (commit: 5b72799) (details / githubweb)
  217. AArch64: Enable fsqrt/dsqrt evaluators in OMRTreeEvaluatorTable (commit: 9904cd4) (details / githubweb)
  218. Require address load instruction for statics in JITServer (commit: f580a3e) (details / githubweb)
  219. Remove unnecessary uses of double-colon rules in makefiles (commit: 9626e94) (details / githubweb)
  220. Improve selection criteria for IndVarEliminination (commit: ce53d62) (details / githubweb)
  221. Run select parts of make-based builds sequentially (commit: 8a63dfb) (details / githubweb)
  222. Use a default empty message when NULL passed to set error api (commit: ed46fae) (details / githubweb)
  223. Add NonSpecificConstObject flag (commit: 8fa3502) (details / githubweb)
  224. Create an extenstible Opcodes.enum (commit: 93bc6ad) (details / githubweb)
  225. Deprecate child types array in Tree.cpp in favor expectedChildType API (commit: 3cf1194) (details / githubweb)
  226. Move postDominators allocation to heap (commit: abc0d12) (details / githubweb)
  227. Move Opcodes.enum into OMROpcodes.enum to allow for extensibility (commit: aa1b2b6) (details / githubweb)
  228. Remove enumValue from Opcodes.enum in favor of opcode (commit: 4c7ba6c) (details / githubweb)
  229. Add Dynamic Breadth First Scan Ordering to Balanced GC (commit: ebc1cc3) (details / githubweb)
  230. Prepare VP tables for downstream extension (commit: e4e8c95) (details / githubweb)
  231. Prepare simplifier tables for downstream extension (commit: 60cf435) (details / githubweb)
  232. Correct "Elf Hello World Tutorial" link (commit: 7245a70) (details / githubweb)
  233. Explicitly specify output for resource compiler (commit: d3a0bb3) (details / githubweb)
  234. AArch64: Implement hbit/nolz/notz evaluators (commit: e93c7de) (details / githubweb)
  235. Add support for CUDA version 11.1 (commit: 5fa0507) (details / githubweb)
  236. NULL ptr field `_postDominators` to avoid scope issues in future (commit: b69fb82) (details / githubweb)
  237. Set _compressObjectReferences if mixed build override not defined (commit: 61a4993) (details / githubweb)
  238. Correct formating to clarify code in for loop (commit: d841b76) (details / githubweb)
  239. Add support for mixed references mode in CMake builds (commit: 8cbff4b) (details / githubweb)
  240. Add print cpu feature info port library API (commit: 472538f) (details / githubweb)
  241. Use TR_BitVector instead of CS2::ABitVector in TR_InterferenceGraph (commit: 6d806b9) (details / githubweb)
  242. OMR::CCData -> TR::CCData (commit: f8644ed) (details / githubweb)
  243. Replace macros with inline methods in CCData impl (commit: 95abb74) (details / githubweb)
  244. Clean up CCData doxygen docs (commit: 5a25e92) (details / githubweb)
  245. Remove internally managed storage from CCData (commit: a8f59c1) (details / githubweb)
  246. Fix aliasing issues with storage, put/get, keys (commit: ee49651) (details / githubweb)
  247. Add a reserve() func rather than overloading put() (commit: 35062c1) (details / githubweb)
  248. Prefer gtest's ASSERT to EXPECT (commit: 6ad799c) (details / githubweb)
  249. Make CCData tests more granular (commit: 741b51d) (details / githubweb)
  250. Move CCData test to fvtest/compilerunittest (commit: ba92393) (details / githubweb)
  251. Print `initialized` stanza to each file (commit: 25d11dd) (details / githubweb)
  252. RISC-V: fully-qualify evaluators in OMRTreeEvaluatorTable.hpp (commit: ae03d9c) (details / githubweb)
  253. Only unset argInfo if value changes (commit: 2565771) (details / githubweb)
  254. Temporarily disable Power reverse load/store optimizations (commit: 24f32c2) (details / githubweb)
  255. Add is_trivially_copyable wrapper for GCC<5 (commit: 80f4034) (details / githubweb)
  256. Simplify type_traits guards (commit: e5e602b) (details / githubweb)
  257. Use larger storage buffers for CCData tests (commit: 652ac2a) (details / githubweb)
  258. Avoid some reinterpret_casts in CCData ops (commit: 0faaaf3) (details / githubweb)
  259. Replace std::is_same with OMR::IsSame (commit: d3a7913) (details / githubweb)
  260. Create jitResolvedFieldIsVolatile helper (commit: 64c519b) (details / githubweb)
  261. Prevent MVC reduction in astoreEvaluator if symref is unresolved (commit: 81f8f75) (details / githubweb)
  262. Fixed traceMsg in LocalAnticipatability (commit: e1d80fa) (details / githubweb)
  263. Swap dequeue and decrement in Scavenger scan queue (commit: 58f212d) (details / githubweb)
  264. Return quickly on OSX when 2M pages cannot be allocated (commit: c6b430b) (details / githubweb)
  265. Fix compile problems in PR #5607 (commit: 4afc1ea) (details / githubweb)
  266. Change when SupportsAlignedAccessOnly flag is set (commit: fac8431) (details / githubweb)
  267. Add traceSequentialStoreSimplification option (commit: f0b0e93) (details / githubweb)
  268. Add support for serialization of TR_BitVector (commit: e9f8cac) (details / githubweb)
  269. Add `contextid` in `concurrent-collection-start` (commit: 6435eec) (details / githubweb)
  270. Add NoReg dependencies for Power two-reg form fixedSeqMemAccess (commit: f14cd51) (details / githubweb)
  271. Add struct TR_SerializedBitVector to maintain order of fields (commit: e6fba68) (details / githubweb)
  272. Initialize immediate fields for RIE instructions (commit: ba50a0f) (details / githubweb)
  273. AArch64: Unset hasResumableTrapHandler if TR_DisableTrap is set (commit: 14f84ff) (details / githubweb)
  274. RISC-V: refactor instruction encoding macros (commit: d5418ee) (details / githubweb)
  275. Reset on-stack buffer pointer for iconv (commit: d64765a) (details / githubweb)
  276. Add preProcess stage to recognized call transformer (commit: bb49727) (details / githubweb)
  277. AArch64: Print instruction comments for memory reference instructions (commit: 59d3d44) (details / githubweb)
  278. AArch64: Add a method for setting up implicit exception point to InstructionDelegate (commit: 0df4d51) (details / githubweb)
  279. Remove newline in omrsysinfo_get_processor_feature_string (commit: 4113537) (details / githubweb)
  280. Upload the documentation for BenefitInliner (commit: 0ba496b) (details / githubweb)
  281. Add the helper classes for abstract interpretation (commit: c97f7ad) (details / githubweb)
  282. Refactor CodeGenTest.hpp (commit: 9e6a398) (details / githubweb)
  283. Add unit tests for abstract interpretation (commit: 977cc0a) (details / githubweb)
  284. RISC-V: implement `riscvCodeSync()` (commit: b7d016e) (details / githubweb)
  285. Contribution to OMR build system for shared cache configuration (commit: d144c3e) (details / githubweb)
  286. RISC-V: use forward declarations in OMRLinkage.hpp (commit: 90b02e8) (details / githubweb)
  287. RISC-V: add TR_RVBinaryEncodingData struct (commit: 948862b) (details / githubweb)
  288. RISC-V: unify `.spp` file compilation with AArch64 (commit: 2327ba5) (details / githubweb)
  289. RISC-V: add processor enum values (commit: a24d33e) (details / githubweb)
  290. Use portable formats from omrformatconsts.h (commit: 8430318) (details / githubweb)
  291. Add TR::MemoryReference::create API with trivial implementation (commit: 2ebbeb3) (details / githubweb)
  292. Use TR::MemoryReference::create API (commit: 8793338) (details / githubweb)
  293. Fix invalid OMR format specifier on Win32 (commit: df3b63f) (details / githubweb)
  294. Fix trees around split point in PostGRA block splitter (commit: 456aa09) (details / githubweb)
  295. Common TR:addDependency() (commit: cd1f7f8) (details / githubweb)
  296. RISC-V: use TR::addDependency() from code generator utils (commit: d1639fa) (details / githubweb)
  297. OMR changes to move J9 specific Call Snippet part (commit: 317fde3) (details / githubweb)
  298. RISC-V: implement "data" instruction (commit: 12588f6) (details / githubweb)
  299. RISC-V: Add getReturnTypeInfoInstruction() / getReturnTypeInfoInstruction() (commit: 0f81a4f) (details / githubweb)
  300. AArch64: Add a variant of helper method for creating constant data snippet (commit: 37c5210) (details / githubweb)
  301. Threading API additions for acquired monitors (commit: f99bca8) (details / githubweb)
  302. RISC-V: improve CMake toolchain file (commit: c53240e) (details / githubweb)
  303. AArch64: Add debug print of register dependencies to branch instructions (commit: f186f7f) (details / githubweb)
  304. Deprecate use of *accessStaticIndirectly API in P and X (commit: 1a7415d) (details / githubweb)
  305. Remove TR_LinkageConventions field in Z linkages (commit: 481e344) (details / githubweb)
  306. Delete TR_S390LinkageConventions enum (commit: ce0f8b1) (details / githubweb)
  307. Remove redundant entries from TR_S390LinkageConventions (commit: d876abd) (details / githubweb)
  308. Add missing return statement (commit: c094f5f) (details / githubweb)
  309. Add support for relo records for block freqeuncy and recomp queued flag (commit: 0729dae) (details / githubweb)
  310. Add recompCounter relocation in generateLoad32BitConstant (commit: eaf836f) (details / githubweb)
  311. Add new relo types (commit: 1eb757e) (details / githubweb)
  312. Add new fields to TR_AOTMethodInfo (commit: 92a77d5) (details / githubweb)
  313. Add new API to inc inline depth (commit: 9784906) (details / githubweb)
  314. Add API to determine relo type for method to be inlined (commit: 56148c7) (details / githubweb)
  315. Add Breakpoint Guard to list of known types for AOT (commit: 867fed7) (details / githubweb)
  316. Remove get and setAccessStaticsIndirectly from Z (commit: 894baef) (details / githubweb)
  317. Add more performant in-reg byte-reverse series of instr for P8 & P9 (commit: eb756f9) (details / githubweb)
  318. Wrap instr mask constant into CONSTANT64() in Power byteSwap (commit: 0edd401) (details / githubweb)
  319. AArch64: Use b.cond instead of cbz/cbnz when all register are used up (commit: 833b00a) (details / githubweb)
  320. Delete obsolete APIs in `MM_VerboseHandlerOutput` (commit: c2890b0) (details / githubweb)
  321. Add field to adjust compact to contract minimum contraction ratio (commit: f7f354f) (details / githubweb)
  322. Fix 0 getContractionSize() in MemorySubSpaceGenerational (commit: c6f0224) (details / githubweb)
  323. Allow tenure to contract beyond LOA size when LOA is empty (commit: 55c525e) (details / githubweb)
  324. RISC-V: implement `_patchVirtualGuard()` (commit: bec5df0) (details / githubweb)
  325. Unblock synchronous signal if it is used (commit: 217933c) (details / githubweb)
  326. Unblock signals after setting the handler (commit: 96937d1) (details / githubweb)
  327. Initial ObjectFormat and FunctionCallData definitions (commit: abdde9e) (details / githubweb)
  328. Create X86 specialization of FunctionCallData (commit: 19410b4) (details / githubweb)
  329. Initial AMD64 implementation of JitCodeRWXObjectFormat (commit: bf613e2) (details / githubweb)
  330. Initial AMD64 implementation of JitCodeRXObjectFormat (commit: b4aa3f0) (details / githubweb)
  331. Add ObjectFormat getter/setter to CodeGenerator (commit: 7f8b6c3) (details / githubweb)
  332. Refactor prex arg info computation and propagation (commit: 71d22eb) (details / githubweb)
  333. Filter "C." in the list of locales using language "en" (commit: dc4d2f5) (details / githubweb)
  334. Update signalExtendedTest re synchronous signals unblock with SIGSEGV (commit: fd64770) (details / githubweb)
  335. Simplify field names and remove unnecessary routine (commit: 9a287b7) (details / githubweb)
  336. Fix the check on isStoreIndirect in LocalAnalysis (commit: 18b7e5d) (details / githubweb)
  337. Fix b2iEvaluator in power for bRegLoad (commit: 5ae1d2b) (details / githubweb)
  338. Don't compare bool with int (commit: b41ed30) (details / githubweb)
  339. Remove inline from CCData static member funcs (commit: f4a99dd) (details / githubweb)
  340. Create relo records of type TR_BlockFrequency and TR_RecompQueuedFlag (commit: c249f4d) (details / githubweb)
  341. Convert `concurrent-mark-end` to `gc-op` in GMP (commit: 2b18099) (details / githubweb)
  342. Fix DDR field inconsistency in mixed refs builds (commit: 4752253) (details / githubweb)
  343. Eliminate vm.heapBaseAddress() (commit: ab1fd2e) (details / githubweb)
  344. Address PR Comments (commit: 55a1b7d) (details / githubweb)
  345. Remove @andrewcraik as a code owner (commit: a5a930c) (details / githubweb)
  346. Consolidate tests for whether to compress pointers (commit: 87fcaa3) (details / githubweb)
  347. Disallow prefetch insertion when read barriers are necessary (commit: 6fef007) (details / githubweb)
  348. AArch64: Implement generateDebugCounterBump (commit: 48ac494) (details / githubweb)
  349. Introduce OMR_FORWARDED_TAG_MASK flag for forwarded header (commit: 644fee0) (details / githubweb)
  350. GC: update comment in MarkingDelegate::scanRoots() (commit: 524772c) (details / githubweb)
  351. Fix gencon to work with flattened arrays (commit: 9893796) (details / githubweb)
  352. Add %sysname dump token on z/OS (commit: 69ef6bf) (details / githubweb)
  353. RISC-V: implement helper call snippet (commit: 3dab8a0) (details / githubweb)
  354. Fix errors in IL documentation (commit: 097669b) (details / githubweb)
  355. Enable jitPersistentAlloc/Free to use non-global persistent memory (commit: cadb5ba) (details / githubweb)
  356. Fix wrong printf code used for JitBuilder ConstInt64 log output (commit: 5a97aea) (details / githubweb)
  357. CMake: use $<TARGET_FILE:target> to specify test executables (commit: 1a4352e) (details / githubweb)
  358. Remove x87 code from RegisterDependency constructor (commit: ae5e0e4) (details / githubweb)
  359. CMake: make sure DDR is disabled when cross-compiling (commit: 6ebbfd4) (details / githubweb)
  360. CMake: allow tests to be run using simulator (commit: 68f2034) (details / githubweb)
  361. Disable several Select tests on RISC-V because of missing implementation (commit: 0d07238) (details / githubweb)
  362. CMake: disable porttests when running tests under simulator (commit: bd501fb) (details / githubweb)
  363. CI: enable tests on RISC-V cross compilation pipeline (commit: b3ec72e) (details / githubweb)
  364. Remove unused applyUserOptions (commit: 318cb74) (details / githubweb)
  365. Add missing switch case statements for Eflags (commit: b552e5e) (details / githubweb)
  366. Raise SIGTRAP in TR::trap() instead of SIGABRT (commit: 5a20f67) (details / githubweb)
  367. Object format changes on Z (commit: b89ff51) (details / githubweb)
  368. Add function to callSnippet API to get the offsetInHalfWods for call (commit: 31b0ba6) (details / githubweb)
  369. Update pointer offset addition for dbf Scan Ordering (commit: 32d447e) (details / githubweb)
  370. Remove and fold code consuming x87 GlobalRegisterFPDependency property (commit: 151a0e4) (details / githubweb)
  371. Remove x87 GlobalRegisterFPDependency regdep property (commit: 4b2ca0e) (details / githubweb)
  372. Create a DIE for a tag that dwarfdump-classic doesn't understand (commit: 6c50f7c) (details / githubweb)
  373. RISC-V: implement copyParametersToHomeLocation() (commit: 24fe4e1) (details / githubweb)
  374. CMake: Update metal-c handling (commit: 7b6fea0) (details / githubweb)
  375. RISC-V: add OpenJ9 specific members to linkage properties (commit: af794ef) (details / githubweb)
  376. Disable fatal message when cross compiling on CYGWIN (commit: ee9a28f) (details / githubweb)
  377. Improve Parallelization of Remembered Set Scanning in Gencon (commit: b429468) (details / githubweb)
  378. AArch64: Generate memory barrier for store if symbol is shadow and ordered (commit: c18fd62) (details / githubweb)
  379. Trim inlines header of extensible classes (commit: 351acbb) (details / githubweb)
  380. Change self() to protected in OMR::Compilation (commit: 7d31ebb) (details / githubweb)
  381. Deprecate isSingleRefUnevaluated (commit: 7219168) (details / githubweb)
  382. Deprecate isSingleRef (commit: 234c0aa) (details / githubweb)
  383. Set up AIX XLClang flags for CMake builds (commit: 80b63f1) (details / githubweb)
  384. VerboseGC Initialized Stanza Print Fix (commit: 7ada644) (details / githubweb)
  385. Fix s2l not sign-extending correctly (commit: eccafd9) (details / githubweb)
  386. Fix s2i improperly clobbering its child's register (commit: b1024d0) (details / githubweb)
  387. Simplify Power integral narrowing conversion evaluators (commit: 2076fd4) (details / githubweb)
  388. Introduce an API for creating loads/stores based on nodes (commit: c475615) (details / githubweb)
  389. Update integral load/store evaluators to use LoadStoreHandler (commit: 362af1b) (details / githubweb)
  390. Update vsplats evaluator to use LoadStoreHandler (commit: b403050) (details / githubweb)
  391. Update vdsetelem evaluator to use LoadStoreHandler (commit: dab5d8d) (details / githubweb)
  392. Update floating-point load/store evaluators to use LoadStoreHandler (commit: 4e41f4c) (details / githubweb)
  393. Update vector load/store evaluators to use LoadStoreHandler (commit: f3996d5) (details / githubweb)
  394. Update byteswap evaluators to use LoadStoreHandler (commit: 49887d6) (details / githubweb)
  395. Update FP bitwise conversion evaluators to use LoadStoreHandler (commit: da4e340) (details / githubweb)
  396. Update FP conversion evaluators to use LoadStoreHandler (commit: 30ffcdb) (details / githubweb)
  397. Update integral conversion evaluators to use LoadStoreHandler (commit: 08e7f0e) (details / githubweb)
  398. Update copyright dates to 2021 (commit: 5d25291) (details / githubweb)
  399. Fix handling of non-volatile unresolved symrefs on ppc32 (commit: 6bfb49b) (details / githubweb)
  400. Add support for lowering optimization (commit: b0197ad) (details / githubweb)
  401. Tril tests for ibits2f, etc. (commit: 3243d20) (details / githubweb)
  402. Misc. source formatting cleanup in CallStack.cpp (commit: 9abd0be) (details / githubweb)
  403. Replace globalAllocator with TR::CompilerEnv rawAllocator (commit: 64dbab2) (details / githubweb)
  404. Remove deprecated GlobalAllocator (commit: 33b3bc7) (details / githubweb)
  405. Remove deprecated GlobalSingletonAllocator (commit: 76426e5) (details / githubweb)
  406. Remove deprecated CS2::stat_allocator (commit: ad85824) (details / githubweb)
  407. Make Optimizer self() function protected (commit: f3633d8) (details / githubweb)
  408. Add relo type for a pointer to an inlined method (commit: d84363c) (details / githubweb)
  409. Support TR_AbsoluteHelperAddress constant address loads on power (commit: d95c149) (details / githubweb)
  410. AArch64: Workaround for huge methods (commit: 6b5b6ac) (details / githubweb)
  411. Add baseReg dependency for POWER generatePairedStoreSequence (commit: f88b97f) (details / githubweb)
  412. Exclude percolate GC CPU time from stats (commit: 7e9a012) (details / githubweb)
  413. Prepare non-helper symbol printing for extensibility (commit: 6b54617) (details / githubweb)
  414. Make NonHelperSymbols enum extensible (commit: 86eae37) (details / githubweb)
  415. Migrate OpenJ9-specific non-helpers to OpenJ9 (commit: 0023c49) (details / githubweb)
  416. Address some warnings from clang on macOS (commit: 480770d) (details / githubweb)
  417. Add support for CUDA version 11.2 (commit: 60ada7d) (details / githubweb)
  418. Reduce use of OMR_HOST_OS (commit: c06a44b) (details / githubweb)
  419. Add useful comment for disableGuardedCountingRecompilation option (commit: 8edf75f) (details / githubweb)
  420. Change self() to protected in OMR::AliasBuilder (commit: ac25e08) (details / githubweb)
  421. Change self() to protected in OMR::SymbolReferenceTable (commit: 7a2411b) (details / githubweb)
  422. Change self() to protected in OMR::Method (commit: 0db12fe) (details / githubweb)
  423. Deprecate PrefetchInsertion optimization (commit: 46e59bf) (details / githubweb)
  424. Updated copyright date in OMRCompilation.hpp (commit: f396843) (details / githubweb)
  425. Increase build & test timeout to 2 hours (commit: 8e4c7eb) (details / githubweb)
  426. Update dataAddr whenever GC moves indexable object (commit: a51b0b0) (details / githubweb)
  427. Remove unused TR_FrontEnd parameter from HedgeTree print and printTree (commit: b3633d9) (details / githubweb)
  428. Fix reading of version from tracepoint data files (commit: e4eccdd) (details / githubweb)
  429. Access system class loader using a front-end query (commit: ff9ac31) (details / githubweb)
  430. Remove allocator name fields (commit: 3710496) (details / githubweb)
  431. Remove unused arena allocator factory function for LabelSymbol (commit: 65bff8f) (details / githubweb)
  432. Remove unused allocator parameter from NodePool constructor (commit: 396702a) (details / githubweb)
  433. Revert "Update dataAddr whenever GC moves indexable object" (commit: 11a5cc6) (details / githubweb)
  434. Remove unused stats collection functions from CS2 allocators (commit: 2a92028) (details / githubweb)
  435. Get TR_OpaqueMethodBlock correct under relocatable compilations (commit: 09c9621) (details / githubweb)
  436. Replace genie-omr with Jenkins in CI documentation (commit: eb46bc9) (details / githubweb)
  437. CEL4RO31 support for shared library load, lookup and close (commit: a100900) (details / githubweb)
  438. Introduce _CEE3164_ENVFILE as a temporary workaround (commit: d236e95) (details / githubweb)
  439. Relax the assertion in RegDepCopyRemoval (commit: 6653517) (details / githubweb)
  440. Update dataAddr whenever GC moves indexable object (commit: 79ec7ca) (details / githubweb)
  441. Increase size of buffer in block validation (commit: f5aba92) (details / githubweb)
  442. AArch64: Support Internal Pointer (commit: 56aa158) (details / githubweb)
  443. AArch64: Enable Internal Pointer (commit: 9e10331) (details / githubweb)
  444. Adaptive GC Threading (commit: 403d231) (details / githubweb)
  445. Suppress MSVC version banner (commit: 04d43b6) (details / githubweb)
  446. Remove redundant file removal (commit: f377a6f) (details / githubweb)
  447. DDR: omit blank lines in annt files (commit: da2df35) (details / githubweb)
  448. Refactor TR_AOTMethodInfo out of TR_InlinedCallSite (commit: 3533681) (details / githubweb)
  449. Rename 'beginner' label to 'good first issue' (commit: b6ddcc3) (details / githubweb)
  450. AArch64: Fix genericBinaryEvaluator for internal pointer case (commit: f769d43) (details / githubweb)
  451. Adjust cardCleaningThreshold for language specific kickoff (commit: 2394198) (details / githubweb)
  452. Increment Exclusive count for percolate Global (commit: da66147) (details / githubweb)
  453. Remove declaration and definition of movedObjectHashCode (commit: b2217c1) (details / githubweb)
  454. Add flag to disable loadaddr specialization in x86 MemoryReferences (commit: 2b0dfe6) (details / githubweb)
  455. AArch64: Support PRFM instruction (commit: d9c0dbc) (details / githubweb)
  456. Remove unused _gpuParms and _gpuBlockDimX fields from Compilation class (commit: a7a8d40) (details / githubweb)
  457. Move snippets-to-be-patched lists from Compilation to CodeGenerator (commit: d8030ee) (details / githubweb)
  458. Consolidate duplicate code to remember snippets containing class pointers (commit: 8729317) (details / githubweb)
  459. Allocate correct buffer size in omrsysinfo_get_OS_type() (commit: 15dca83) (details / githubweb)
  460. Better detection of Windows 10 in omrsysinfo_get_OS_type() (commit: f842ddc) (details / githubweb)
  461. Compute Windows 10 build number in omrsysinfo_get_OS_version() (commit: 365121e) (details / githubweb)
  462. AArch64: Add class unloading pic site to address constant (commit: 0329ee1) (details / githubweb)
  463. Add opt methodHandleTransformer (commit: 488b6e8) (details / githubweb)
  464. Guard adaptiveThreadingEnabled() for OMR_GC_MODRON_SCAVENGER only (commit: 7579b9a) (details / githubweb)
  465. Fix AArch64 compile failures (commit: 1a639d3) (details / githubweb)
  466. Fix memory leak from omrsysinfo_get_OS_version() (commit: c03692e) (details / githubweb)
  467. AArch64: Vector add/ orr instruction inclusion (commit: 42d73ef) (details / githubweb)
  468. AArch64: Vector register support on stack mapping (commit: fe78cd7) (details / githubweb)
  469. AArch64: Vector load and store support (commit: c842228) (details / githubweb)
  470. AArch64: Vector add implementation (commit: 35728e5) (details / githubweb)
  471. Add memory object type for OpenJ9 JITServer AOT cache (commit: 25a4fc2) (details / githubweb)
  472. Remove unused _noEarlyInline field from Compilation class (commit: f8aec14) (details / githubweb)
  473. AArch64: Add register related virtual method to ARM64MemInstruction (commit: afaf113) (details / githubweb)
  474. AArch64: Vector add tril test (commit: 7120a36) (details / githubweb)
  475. AArch64: Vector subtraction opcode inclusion (commit: 036741e) (details / githubweb)
  476. AArch64: Vector subtraction implementation (commit: 01620d9) (details / githubweb)
  477. Map OMRPORT_RESOURCE_ADDRESS_SPACE to RLIMIT_MEMLIMIT for z/OS 64 bit (commit: 4f14314) (details / githubweb)
  478. RISC-V: refactor `initRVRealRegisterLinkage()` to use (new) FOR_EACH_RESERVED_REGISTER()` macro (commit: 5a080e6) (details / githubweb)
  479. CMake: Remove ASM-ZOS (commit: 4f64d57) (details / githubweb)
  480. Skip some tests in compilertriltest on AArch64 (commit: 505d834) (details / githubweb)
  481. Add TR_VMINLMethod relo type (commit: 77cea00) (details / githubweb)
  482. Add computedStaticCallSymbol (commit: 8385ad2) (details / githubweb)
  483. PPC: Exclude tril tests (commit: ea5be46) (details / githubweb)
  484. AArch64: Vector sub tril test (commit: fd15d9a) (details / githubweb)
  485. AArch64: Print instruction comments for branch instructions (commit: ba8cfe6) (details / githubweb)
  486. AArch64: Enable using VirtualGuardNOP as branch to OOL section. (commit: f0ca449) (details / githubweb)
  487. Initialize TR_X86ProcessorInfo once (commit: be400f0) (details / githubweb)
  488. RISC-V: move FOR_EACH_*_REGISTER() macros to OMRLinkage.hpp (commit: bfa41af) (details / githubweb)
  489. RISC-V: implement ++ operators for TR::RealRegister::RegNum (commit: dd45ea2) (details / githubweb)
  490. RISC-V: introduce RVLinkageProperties::initialize() to initialize derived members (commit: b194b27) (details / githubweb)
  491. RISC-V: move initialization of (system) linkage properties to its own class (commit: f314772) (details / githubweb)
  492. RISC-V: make system linkage properties static (commit: 43983d7) (details / githubweb)
  493. RISC-V: add comment RVSystemLinkageProperties::initialize() (commit: d9c35bd) (details / githubweb)
  494. Add notes on GlRegDeps (commit: 50cfe56) (details / githubweb)
  495. Ensure consistency between resolved method and symbol wrt isInterpreted (commit: ebeac7b) (details / githubweb)
  496. Fix Peephole optimization for iushr,ishr (commit: 90229d2) (details / githubweb)
  497. AArch64: Vector mul-div opcode inclusion (commit: 2f0a0e3) (details / githubweb)
  498. AArch64: Vector mul-div implementation (commit: fdb9b28) (details / githubweb)
  499. Separate OMR x86 linkage properties from linkage class (commit: edecda6) (details / githubweb)
  500. Define isArrayCompTypeValueType method for Value Propagation (commit: d429462) (details / githubweb)
  501. Restore concurrent end trigger (commit: 39dd3d8) (details / githubweb)
  502. AArch64: Improve code generation for i2l-lshl sequence (commit: ca33fa8) (details / githubweb)
  503. Update CEL4RO31 control block function descriptor member (commit: ab60693) (details / githubweb)
  504. Cleanup PPCArrayCmp remnants (commit: 4f27f79) (details / githubweb)
  505. Remove gap in runtime helper table enum values (commit: 920c993) (details / githubweb)
  506. AArch64: Vector mul-div tril test (commit: 233e0f0) (details / githubweb)
  507. Vector tril test comments cleanup (commit: 2b3ef73) (details / githubweb)
  508. Dummy OMROptimizer_inlines.hpp header added (commit: f75db26) (details / githubweb)
  509. Cleanup PPCArrayCmp remnants (commit: afd29aa) (details / githubweb)
  510. Reorg Scavenger::copy() epilog (commit: 51cde66) (details / githubweb)
  511. Fix paddi and lxvdsx for vsplatsEvaluator to have GPR register (commit: 96c559a) (details / githubweb)
  512. Revert "AArch64: Improve code generation for i2l-lshl sequence" (commit: 9189430) (details / githubweb)
  513. AArch64: Use correct parameter for memory barrier instructions (commit: d673188) (details / githubweb)
  514. Check if current phase concurrent when trying to yield (commit: 5c5e544) (details / githubweb)
  515. Optimizer_inlines.hpp header added (commit: 2dbaf28) (details / githubweb)
  516. Add notes on mainline and outofline concepts (commit: 6738cf6) (details / githubweb)
  517. Remove _LONG_LONG from TR_COMPILE_DEFINITIONS on z (commit: abd98f3) (details / githubweb)
  518. CMake: fix ddr macro processing on z/OS (commit: 5ef8609) (details / githubweb)
  519. Add default constructor for SymbolReference (commit: 1c1853c) (details / githubweb)
  520. Remove Signed-off-by requirement for OMR commits (commit: 8d093fc) (details / githubweb)
  521. Generate normal .exp files (commit: 4cfbe42) (details / githubweb)
  522. AArch64: Add processor feature detection to port library (commit: 92ff179) (details / githubweb)
  523. AArch64: Add query for supported feature of CPU (commit: 5fa8002) (details / githubweb)
  524. Fix typo of AARCH64 processor type enum (commit: d8fc029) (details / githubweb)
  525. Add AbsoluteHelperAddress Relocation for PPCSystemLinkage calls (commit: b455eec) (details / githubweb)
  526. Fix compiler errors when DEBUG is defined (commit: 41c46b8) (details / githubweb)
  527. Remove unused global memoryAllocMonitor definition (commit: e822618) (details / githubweb)
  528. Remove unused temps from x86 CodeGenerator (commit: abf40db) (details / githubweb)
  529. Use a human readable name for the object comparison non-helper (commit: 526e63b) (details / githubweb)
  530. Remove deprecated references to X86 UnresolvedVirtualCallSnippets (commit: 071549d) (details / githubweb)
  531. Deprecate isWarm parameter for data snippets (commit: e899aab) (details / githubweb)
  532. Add omrstr_ftime_ex() (commit: 42b04a6) (details / githubweb)
  533. New `concurrent-start/end` for Global Marking (commit: 34dc1e7) (details / githubweb)
  534. Cleanup SwitchAnalyzer by removing dead code, unused includes, formatting issues (commit: 8b923cd) (details / githubweb)
  535. CMake: update z/OS export handling (commit: 7be1ed4) (details / githubweb)
  536. Guard a2e calls and update CELQGIPB vector offset (commit: 0b048ba) (details / githubweb)
  537. Deprecate findOrCreateLiteral codegen API (commit: 4a14a85) (details / githubweb)
  538. CMake: fix typo in DDRSetStub.cmake.in (commit: b0f8793) (details / githubweb)
  539. Add omrsl cel4ro31 testcase (commit: fc2bff7) (details / githubweb)
  540. Add j9VMThreadFloatTemp1Symbol (commit: e8c0516) (details / githubweb)
  541. Remove deprecated TR::MergeNew IL opcode (commit: d2b7841) (details / githubweb)
  542. Remove unused trigonometry opcodes (commit: eb465c4) (details / githubweb)
  543. Remove unused TR::log/TR::vdlog IL opcodes (commit: e0605ab) (details / githubweb)
  544. Remove unused exp family IL opcodes (commit: 52b1c65) (details / githubweb)
  545. Remove unused IL opcodes (commit: 708cf01) (details / githubweb)
  546. Remove unused IL opcodes (commit: 9b3534b) (details / githubweb)
  547. Remove unused XuRegLoad/XuRegStore/aXuadd IL opcodes (commit: 0ee2909) (details / githubweb)
  548. Remove unused TR::arraycmpWithPad IL opcode (commit: 37f0935) (details / githubweb)
  549. Deprecate a set of DFP recognized methods (commit: 265f871) (details / githubweb)
  550. Deprecate code guarded by SUPPORT_DFP (commit: ad3a5b2) (details / githubweb)
  551. Deperecate all DFP opcodes and datatypes (commit: 9f31bc7) (details / githubweb)
  552. Deprecate DFP related code in Z codegen (commit: 02c7abe) (details / githubweb)
  553. Deprecate DFP related options (commit: 7780a2b) (details / githubweb)
  554. AArch64: Implement atomic add and swap codegen support (commit: 8dc482a) (details / githubweb)
  555. CMake: Set LIBPATH for ddr on z/OS (commit: 323d32a) (details / githubweb)
  556. Enable omrthread_get_stack_range on AIX (commit: 141c34e) (details / githubweb)
  557. Disable x87 floating point for 32-bit code generation (commit: 576745e) (details / githubweb)
  558. Deprecate miscellaneous DFP APIs (commit: 89c1ba3) (details / githubweb)
  559. Deprecate blockIndex in aarch64 and arm (commit: ef9fa86) (details / githubweb)
  560. Deprecate blockIndex in Power (commit: 1d89b25) (details / githubweb)
  561. Deprecate blockIndex in riscv (commit: 901a96f) (details / githubweb)
  562. Deprecate blockIndex in Z (commit: 4969afa) (details / githubweb)
  563. Deprecate blockIndex in codegen (commit: 425504c) (details / githubweb)
  564. Deprecate TR_DisableOOL option (commit: 2f617f6) (details / githubweb)
  565. AArch64: Enable byteswap (commit: af6aafc) (details / githubweb)
  566. Update getProcessorName routines (commit: 03905d3) (details / githubweb)
  567. Fix omrthread_get_stack_range behaviour on AIX (commit: e1139d5) (details / githubweb)
  568. Deprecate dead APIs used in doRegisterAssignment (commit: a2c7728) (details / githubweb)
  569. Deprecate hasBeenVisited block API (commit: 3d2a47c) (details / githubweb)
  570. Remove isOutOfLineColdPath guards from doRegisterAssignment (commit: 24a5774) (details / githubweb)
  571. Migrate TBEGIN register allocator code to S390SILInstruction (commit: 739caac) (details / githubweb)
  572. Migrate DCB register allocation code to S390DebugCounterBumpInstruction (commit: 8c45dc1) (details / githubweb)
  573. Migrate handleLoadWithRegRanges to OMRInstruction.cpp (commit: 1506708) (details / githubweb)
  574. Migrate removeGhostRegistersFromGCMaps to ARMConditionalBranchInstruction (commit: decbc18) (details / githubweb)
  575. Unify doRegisterAssignment on all platforms except x86 (commit: 6ed62c2) (details / githubweb)
  576. Avoid zeroing out spilled register lists for OOL (commit: 7d3ca8f) (details / githubweb)
  577. Add getProcessorName to other codegens (commit: da34f97) (details / githubweb)
  578. Define __EXTABI__ for Port library compilation on AIX64 (commit: 1a3d24c) (details / githubweb)
  579. CMake: Update handling of a2e/omr_ascii (commit: abc94cf) (details / githubweb)
  580. Introduce New Default Scan Ordering 'None' (commit: d24ef7d) (details / githubweb)
  581. Unify TR_*OutOfLineCodeSection::assignRegisters across codegens (commit: 1d23350) (details / githubweb)
  582. Deprecate TR_OptimizeForSpace (commit: 20d6734) (details / githubweb)
  583. Deprecate unsigned equality compare IL (commit: 5681311) (details / githubweb)
  584. Deprecate unsigned load IL (commit: 926ac47) (details / githubweb)
  585. Deprecate unsigned store IL (commit: 984a3ae) (details / githubweb)
  586. Deprecate unsigned add/subtract IL (commit: b977b61) (details / githubweb)
  587. Deprecate unsigned shift IL (commit: 55d20a4) (details / githubweb)
  588. Deprecate unsigned shift logical IL (commit: 9a7b9ee) (details / githubweb)
  589. Deprecate isNotDeprecatedUnsigned (commit: 5459b3f) (details / githubweb)
  590. Fix -Wcomment (commit: 387ae3f) (details / githubweb)
  591. Fix -Wnull-arithmetic (commit: 39ba2e1) (details / githubweb)
  592. Fix -Wformat (commit: 4ba2ff8) (details / githubweb)
  593. Enable warnings as errors in compiler component on OSX (commit: 36f9278) (details / githubweb)
  594. AArch64: Vector bitwise AND operation (commit: 0d7fc8c) (details / githubweb)
  595. AArch64: Vector bitwise OR operation (commit: 7c65f12) (details / githubweb)
  596. AArch64: Vector bitwise Exclusive OR operation (commit: 9e26ef3) (details / githubweb)
  597. AArch64: Vector Negate operation (commit: 56b4e29) (details / githubweb)
  598. AArch64: Vector bitwise NOT operation (commit: 236a9b4) (details / githubweb)
  599. CMake: apply omr_base flags to omrutil_obj (commit: 0a66a61) (details / githubweb)
  600. CMake: Fix handling of ddr scanner (commit: 008aa07) (details / githubweb)
  601. Disable -Winvalid-offsetof in FEBase.cpp (commit: 140c336) (details / githubweb)
  602. Update vnot IL Opcode Properties (commit: 0ebad75) (details / githubweb)
  603. Fix -Wlogical-op-parentheses (commit: ba13223) (details / githubweb)
  604. Fix omrthread_get_stack_range on Mac OSX (commit: 76e5e03) (details / githubweb)
  605. AArch64: Add atomic operation instructions introduced by FEAT_LSE (commit: 57b4dca) (details / githubweb)
  606. AArch64: Use atomic operation instructions for atomic method symbols (commit: b45c245) (details / githubweb)
  607. Convert RegisterDependencyGroup to an extensible class on Z (commit: e38eed9) (details / githubweb)
  608. Convert RegisterDependencyGroup to an extensible class on Power (commit: ec7638c) (details / githubweb)
  609. Convert RegisterDependencyGroup to an extensible class on x86 (commit: 02edfb9) (details / githubweb)
  610. Convert RegisterDependencyGroup to an extensible class on AArch64 (commit: b45d152) (details / githubweb)
  611. Convert RegisterDependencyGroup to an extensible class on ARM (commit: 85b7630) (details / githubweb)
  612. Convert RegisterDependencyGroup to an extensible class on RISC-V (commit: 1923beb) (details / githubweb)
  613. Simplify concrete definition of RegisterDependencyGroup (commit: a5bca79) (details / githubweb)
  614. Add OMR_EXTENSIBLE to RegisterDependencyGroup in each codegen (commit: 847e05a) (details / githubweb)
  615. Implement and use self() for RegisterDependencyGroup (commit: 896d27b) (details / githubweb)
  616. Prepare replacing MemoryPoolBumpPointer with (commit: b27da20) (details / githubweb)
  617. Remove deprecated callTheJitsArrayCopyHelper() function (commit: a190d0b) (details / githubweb)
  618. Remove unused canTransformArrayCopyCallForSmall() (commit: ea9c36f) (details / githubweb)
  619. Update TR_ResolvedMethod to obtain the number of ROM method args (commit: f72bfa7) (details / githubweb)
  620. Remove deprecated TR_AVLTree from ValuePropagation (commit: 77bfee0) (details / githubweb)
  621. Vector bitwise Tril tests (commit: 9d8c4a2) (details / githubweb)
  622. AArch64: Add ScratchRegisterDependencyConditions class (commit: a08cfb8) (details / githubweb)
  623. Deprecate unused pseudo-instructions on Z (commit: 207569c) (details / githubweb)
  624. Create a cross-codegen OMRInstOpcode.enum (commit: c6b4401) (details / githubweb)
  625. Rename OMRInstOpcodeEnum.hpp to OMRInstOpcode.enum (commit: f2763d7) (details / githubweb)
  626. Migrate assocreg to the common codegen (commit: 8a1541b) (details / githubweb)
  627. Migrate bad to the common codegen (commit: 4a20228) (details / githubweb)
  628. Migrate dd to the common codegen (commit: c922bd4) (details / githubweb)
  629. Migrate fence to the common codegen (commit: 8d698eb) (details / githubweb)
  630. Migrate label to the common codegen (commit: e62f3d2) (details / githubweb)
  631. Migrate proc to the common codegen (commit: 9c45612) (details / githubweb)
  632. Moved _ialoadUnneeded field to Z CodeGenerator (commit: 6434715) (details / githubweb)
  633. Handle both AddressOrdered and BumpPointer regionType in setMarkMapValid (commit: 80a68c7) (details / githubweb)
  634. Prevent LoopVersioner from attempting to privatize BCD type nodes (commit: 4c68263) (details / githubweb)
  635. Add command line option to make inliner more aggressive (commit: b079422) (details / githubweb)
  636. Update Default Scan Ordering Configuration (commit: debf0a8) (details / githubweb)
  637. Migrate retn to the common codegen (commit: c1b3520) (details / githubweb)
  638. Migrate vgnop to the common codegen (commit: 4dd0b66) (details / githubweb)
  639. Fixup binaryEncodings on AArch64 and RISC-V (commit: b224aa3) (details / githubweb)
  640. Make _ialoadUnneeded protected (commit: f587737) (details / githubweb)
  641. Allow 64K page size as a valid option on AIX (commit: 3978111) (details / githubweb)
  642. AArch64: Improve code generation for i2l-lshl sequence (commit: 439b733) (details / githubweb)
  643. Limit Incremental Card Alignment under 64 bit system (commit: d1944d9) (details / githubweb)
  644. Replace method in VPHandlers.cpp with equivalent method in VP (commit: 6714867) (details / githubweb)
  645. Enable OSR for profiling compilations with JProfiling (commit: 8caf6fe) (details / githubweb)
  646. Reduce MemoryPoolAddressOrderedList casting in Usage (commit: 2a61988) (details / githubweb)
  647. Revert "Allow 64K page size as a valid option on AIX" (commit: 982a3ae) (details / githubweb)
  648. Refactor CopyForward to reuse fixupForwardedObject (commit: c57a70c) (details / githubweb)
  649. Make InstOpCode an extensible class on x86 (commit: 3a5345e) (details / githubweb)
  650. Create skeleton OMRInstOpCode files and classes (commit: 341a6b3) (details / githubweb)
  651. Replace includes of X86Ops.hpp with OMRInstOpCode.hpp (commit: ccd1fcc) (details / githubweb)
  652. Temporarily inherit TR_X86OpCode from InstOpCode (commit: 368355e) (details / githubweb)
  653. Temporarily remove InstOpCode::length (commit: 36f0e3d) (details / githubweb)
  654. Replace instantiations of TR_X86OpCode with TR::InstOpCode (commit: c75023f) (details / githubweb)
  655. Deprecate TR_X86OpCode (commit: ca28401) (details / githubweb)
  656. Inline X86Ops.hpp into OMRInstOpCode.hpp (commit: 42393a0) (details / githubweb)
  657. Add common pseudo-instructions to X86Ops.ins (commit: 54ca99b) (details / githubweb)
  658. Alias TR_X86OpCodes with OMR::InstOpCode::Mnemonic (commit: 23cc13b) (details / githubweb)
  659. Deprecate TR_X86OpCodes in favour of TR::InstOpCode::Mnemonic (commit: 3c6384e) (details / githubweb)
  660. Deprecate _opcode in favour of _mnemonic (commit: 8b051bc) (details / githubweb)
  661. Revamp Jenkins labels to a single compile label (commit: 237e32a) (details / githubweb)
  662. Fix construction of log file name with TR_EnablePIDExtension (commit: d56ec61) (details / githubweb)
  663. Correct condition used to setting unneeded aloadi (commit: f285fc7) (details / githubweb)
  664. Migrate getOpCodeName and getMnemonicName from OpNames.cpp (commit: ab74df3) (details / githubweb)
  665. AArch64: Fix i2l-lshl optimization (commit: 054ad1e) (details / githubweb)
  666. Allow inliner policy to decide whether to remove differing targets (commit: d4f24cc) (details / githubweb)
  667. AArch64: Implement fmax/fmin/dmax/dmin evaluators (commit: 2852c11) (details / githubweb)
  668. Remove TR_DebugExt friend class (commit: d299610) (details / githubweb)
  669. Remove isDebugExtension (commit: 5b33fe0) (details / githubweb)
  670. Update Copyrights (commit: aad441e) (details / githubweb)
  671. AArch64: Implement fcmpg/fcmpl/dcmpg/dcmpl evaluators (commit: f40e11a) (details / githubweb)
  672. Standardize evaluator names on RISC-V (commit: ef36ae9) (details / githubweb)
  673. Standardize evaluator names on AArch64 (commit: 8d986d9) (details / githubweb)
  674. Standardize evaluator names on ARM (commit: 5c37e71) (details / githubweb)
  675. Standardize evaluator names on Power (commit: 2bdb711) (details / githubweb)
  676. Standardize evaluator names on x86 (commit: ab0f64c) (details / githubweb)
  677. Standardize evaluator names on Z (commit: be0fa25) (details / githubweb)
  678. Deprecate the TreeEvaluatorTable across codegens (commit: f753871) (details / githubweb)
  679. Deprecate unused zccAddSubEvaluator (commit: 00daa3e) (details / githubweb)
  680. Override x86 and Power undefined evaluators (commit: f17e0de) (details / githubweb)
  681. Override isILOpCodeSupported on x86 (commit: 6966969) (details / githubweb)
  682. Override isILOpCodeSupported on RISC-V (commit: 30ee445) (details / githubweb)
  683. Allow 64K page size as a valid option on AIX (commit: cd284c1) (details / githubweb)
  684. Add an option to buffer expensive JITServer compilations (commit: 6d9e4dc) (details / githubweb)
  685. AArch64: Add TR_ARM64jitCollapseJNIReferenceFrame to getRuntimeHelperName (commit: 947e5e7) (details / githubweb)
  686. Improve code generation for inlineArrayCmp on Power10 (commit: a95aba5) (details / githubweb)
  687. Implement supportsInliningOfIsInstance on POWER (commit: 59dc6c1) (details / githubweb)
  688. Use addAtomic for incrementing counters of OMRMemCategory (commit: 85f6038) (details / githubweb)
  689. Print OMR options in effect into the verbose log (commit: 8b3021d) (details / githubweb)
  690. Add a method to get maximum heap size for zOS compressedrefs mode (commit: bc31ba4) (details / githubweb)
  691. Fix formatting (commit: 188a872) (details / githubweb)
  692. Include omriarv64.h only for ZOS 64bit (commit: 37e866c) (details / githubweb)
  693. Remove code guarded by TR_OrderedCompiles (commit: 29100d1) (details / githubweb)
  694. Delete unused sample point code (commit: 6fbc33e) (details / githubweb)
  695. AArch64: Fix build break (commit: 3d61ebb) (details / githubweb)
  696. Remove vrand IL opcode (commit: f590028) (details / githubweb)
  697. Remove vinc/vdec IL opcodes (commit: adf0f11) (details / githubweb)
  698. Remove vdrem IL opcode (commit: 143f75c) (details / githubweb)
  699. Remove virem IL opcode (commit: 54c2491) (details / githubweb)
  700. Remove vrem IL opcode (commit: 4fbff9e) (details / githubweb)
  701. Remove vcom IL opcode (commit: 5b16c2b) (details / githubweb)
  702. Remove vucmplt/vucmpgt/vucmple/vucmpge IL opcodes (commit: 54db05a) (details / githubweb)
  703. Remove vshl/vshr/vushr IL opcodes (commit: 788c38c) (details / githubweb)
  704. Remove vdmadd/vdmsub/vdnmsub IL opcodes (commit: 9d1ec65) (details / githubweb)
  705. Remove vicmpall family IL opcodes (commit: 858cf12) (details / githubweb)
  706. Remove vicmpany family IL opcodes (commit: 0597110) (details / githubweb)
  707. Remove vdcmpall family IL opcodes (commit: f4f0b41) (details / githubweb)
  708. Remove vdcmpany family IL opcodes (commit: 3535dc3) (details / githubweb)
  709. Remove dereferences that crash out-of-process compilations (commit: 2b66131) (details / githubweb)
  710. Remove wrapper method createJittedMethodSymbol in Compilation (commit: 245fd4c) (details / githubweb)
  711. Add DummyResolvedMethod flag to OMR Symbol (commit: 316fe47) (details / githubweb)
  712. Fix iteration in redundant goto elimination (commit: e495805) (details / githubweb)
  713. Implementing ArrayCopyBNDCHKEvaluator() on AArch64 (commit: b753913) (details / githubweb)
  714. Enable warnings as errors in compiler component on Linux x86 (commit: 848cf1a) (details / githubweb)
  715. Fix C4068 (commit: 5ee725f) (details / githubweb)
  716. Fix C4312 (commit: eedae63) (details / githubweb)
  717. Fix C4717 (commit: b09bfc2) (details / githubweb)
  718. Fix C4291 (commit: aa4cbb1) (details / githubweb)
  719. Fix C4351 (commit: 946ac17) (details / githubweb)
  720. Fix C4258 (commit: ba0eb3a) (details / githubweb)
  721. Fix left shift count >= width of type (commit: 82622ed) (details / githubweb)
  722. Fix -Wformat= (commit: e2ebd2e) (details / githubweb)
  723. Fix C4065 (commit: 059bd52) (details / githubweb)
  724. Fix C4101 (commit: 98d46b0) (details / githubweb)
  725. Fix C4267 (commit: 5cefde1) (details / githubweb)
  726. Fix C4244 (commit: 6e551ea) (details / githubweb)
  727. Fix C4018 (commit: 131c4a7) (details / githubweb)
  728. Fix C4800 (commit: 0f3b2e6) (details / githubweb)
  729. Fix C4099 (commit: ab19e76) (details / githubweb)
  730. Fix C4146 (commit: d1f5435) (details / githubweb)
  731. Fix C4102 (commit: 5527444) (details / githubweb)
  732. Fix C4267 (commit: 8f54f70) (details / githubweb)
  733. Fix C4390 (commit: 1fe042d) (details / githubweb)
  734. Fix C4333 (commit: d6fc12e) (details / githubweb)
  735. Fix C4244 (commit: 23b6162) (details / githubweb)
  736. Fix C4345 (commit: 3de4141) (details / githubweb)
  737. Fix C4996 (commit: 4bbec8c) (details / githubweb)
  738. Fix C4319 (commit: 5c85392) (details / githubweb)
  739. Fix C4334 (commit: b96541d) (details / githubweb)
  740. Fix corner case negation of INT_MIN in constrainIabs (commit: fd52af9) (details / githubweb)
  741. Fix C4715 (commit: 198114e) (details / githubweb)
  742. Fix C4305 (commit: a067301) (details / githubweb)
  743. Enable warnings as errors in compiler component on Windows x86 (commit: 3cbc835) (details / githubweb)
  744. Migrate warnings as error queries outside of create_omr_compiler_library (commit: 31bfe55) (details / githubweb)
  745. Apply warnings flags only to C/CXX sources (commit: 9e907fb) (details / githubweb)
  746. Fix createIntRangeConstraint warning (commit: b2e3cb5) (details / githubweb)
  747. Add disableStableAnnotations command line option (commit: 2c2ebd2) (details / githubweb)
  748. Ignore unreachable paths in TR::GlobalValuePropagation::mergeDefinedOnAllPaths (commit: df01f62) (details / githubweb)
  749. Make InstOpCode an extensible class on ARM (commit: bf65603) (details / githubweb)
  750. Create skeleton OMRInstOpCode files and classes (commit: faaca57) (details / githubweb)
  751. Replace includes of ARMOps.hpp with OMRInstOpCode.hpp (commit: 5d05197) (details / githubweb)
  752. Temporarily inherit TR_ARMOpCode from InstOpCode (commit: 86cef15) (details / githubweb)
  753. Replace instantiations of TR_ARMOpCode with TR::InstOpCode (commit: 70953c3) (details / githubweb)
  754. Deprecate TR_ARMOpCode (commit: 088d5c1) (details / githubweb)
  755. Inline ARMOps.hpp into OMRInstOpCode.hpp (commit: 782e206) (details / githubweb)
  756. Add common pseudo-instructions to ARM enums (commit: 6b4ce58) (details / githubweb)
  757. Alias TR_ARMOpCodes with OMR::InstOpCode::Mnemonic (commit: b50d71b) (details / githubweb)
  758. Deprecate TR_ARMOpCodes in favour of TR::InstOpCode::Mnemonic (commit: fe2f0b5) (details / githubweb)
  759. Deprecate _opcode in favour of _mnemonic (commit: 257ba18) (details / githubweb)
  760. Add x87 instructions intended for use with pre-encoded registers. (commit: 059eeca) (details / githubweb)
  761. Enable SSE3 feature check which will be required for FP calculations (commit: dcfb579) (details / githubweb)
  762. Propagate CEL4RO31 lookup return code to trace point (commit: e15cc29) (details / githubweb)
  763. Exploit CEEPCB_3164 indicator bit (commit: 112cce7) (details / githubweb)
  764. Use common assocreg instruction on x86 (commit: 2200a36) (details / githubweb)
  765. Use common bad instruction on x86 (commit: ef995bc) (details / githubweb)
  766. Use common fence instruction on x86 (commit: 116b1ce) (details / githubweb)
  767. Use common label instruction on x86 (commit: 9fc3a0f) (details / githubweb)
  768. Use common proc instruction on x86 (commit: 9263c24) (details / githubweb)
  769. Use common retn instruction on x86 (commit: 00b4508) (details / githubweb)
  770. Use common vgnop instruction on x86 (commit: 5849cdc) (details / githubweb)
  771. Remove unused pseudo-instructions on x86 (commit: d317906) (details / githubweb)
  772. Prefix x86 instruction mnemonic usages with TR::InstOpCode:: (commit: a350864) (details / githubweb)
  773. Refactor opcode parametarizations in preparation for migration (commit: 0b28027) (details / githubweb)
  774. Fix accessing NULL lhs or rhs when printing VP in trace (commit: 7226957) (details / githubweb)
  775. Remove OpenJ9 specific evaluators from z/codegen (commit: ecde3a1) (details / githubweb)
  776. Use SKIP_ON_* macros to skip CallTest on unsupported platforms (commit: 29eff54) (details / githubweb)
  777. RISC-V: fix registerExchange() for FP registers (commit: ce144df) (details / githubweb)
  778. RISC-V: implement registerCopy() for FP registers (commit: 9949cc6) (details / githubweb)
  779. RISC-V: rename getNumberOfDependencyGPRegisters() to getNumberOfDependencyRegisters() (commit: 72ee978) (details / githubweb)
  780. RISC-V: increase a number dependency registers to accommodate both all GPRs and all FPRs (commit: 3d133dd) (details / githubweb)
  781. RISC-V: fix NULLing of register dependencies in `RVSystemLinkage::buildArgs()` (commit: c508805) (details / githubweb)
  782. RISC-V: take parameter offset into account when passing parameters on stack (commit: 86b4a2b) (details / githubweb)
  783. RISC-V: fix passing FP arguments when using system linkage (commit: 38d6646) (details / githubweb)
  784. RISC-V: fix direct calls for resolved methods (commit: fc21c26) (details / githubweb)
  785. RISC-V: enable CallTest (commit: 862e6cf) (details / githubweb)
  786. RISC-V: enable linkage tests (commit: 603ea10) (details / githubweb)
  787. Move definition of PersistentInfo::createCounters to cpp file (commit: b17a7cd) (details / githubweb)
  788. AArch64: Fix compareIntsAndBranchForArrayCopyBNDCHK() (commit: d4daa7a) (details / githubweb)
  789. Remove inline keyword from OMR::Optimizer::self in cpp file (commit: 502e5ca) (details / githubweb)
  790. RISC-V: improve loadConstant64() (commit: 4162462) (details / githubweb)
  791. New static method initializeFreeMemoryProfileMaxSizeClasses (commit: d5ec0c2) (details / githubweb)
  792. RISC-V: use either `auto` or explicitly-sized integer types (commit: 8a7f2c0) (details / githubweb)
  793. Add guarding macro when including OS specific header (commit: b12110c) (details / githubweb)
  794. Revert "Move definition of PersistentInfo::createCounters to cpp file" (commit: ec0f7f6) (details / githubweb)
  795. Prefix x86 parameterized instruction mnemonic usages with TR::InstOpCode:: (commit: f7368dd) (details / githubweb)
  796. Use common bad instruction on ARM (commit: e4fe8b4) (details / githubweb)
  797. Use common dd instruction on ARM (commit: aba6226) (details / githubweb)
  798. Use common fence instruction on ARM (commit: 46b56b5) (details / githubweb)
  799. Use common label instruction on ARM (commit: 54e8adb) (details / githubweb)
  800. Use common proc instruction on ARM (commit: e054445) (details / githubweb)
  801. Use common retn instruction on ARM (commit: 6739470) (details / githubweb)
  802. Use common vgnop instruction on ARM (commit: 8068798) (details / githubweb)
  803. Prefix ARM instruction mnemonic usages with TR::InstOpCode:: (commit: 8fc31ef) (details / githubweb)
  804. Enhance warnings as error flag to be language specific (commit: 1a5a46e) (details / githubweb)
  805. Deprecate OMR_BASE_WARNING_FLAGS (commit: 47f3045) (details / githubweb)
  806. Add warnings as error and enhanced warnings flags for MASM and NASM (commit: b3689e9) (details / githubweb)
  807. AArch64: Int32 & Int64 Support for Vector Add (commit: 551857c) (details / githubweb)
  808. AArch64: Int32 & Int64 Support for Vector Subtract (commit: ea6ff48) (details / githubweb)
  809. AArch64: Int32 Support for Vector Multiplication (commit: 9b9f82d) (details / githubweb)
  810. RISC-V: convert some TR_ASSERT()s to TR_ASSERT_FATAL()s (commit: 50dcd28) (details / githubweb)
  811. RISC-V: convert some C-style casts to C++ casts (commit: 68cbeb8) (details / githubweb)
  812. Remove ARMOp_ prefix now that mnemonics are enum scoped (commit: 7fe991d) (details / githubweb)
  813. AArch64: Vector Splat Implementation (commit: 7bac47e) (details / githubweb)
  814. Check for warnings as error flag definition before using it (commit: 78fd83d) (details / githubweb)
  815. AArch64: Add arraycopy helpers (commit: 358645c) (details / githubweb)
  816. Fix -Wformat (commit: 61593b2) (details / githubweb)
  817. Fix -Wconversion-null (commit: 186ac2f) (details / githubweb)
  818. Refactor copy to use template for concurrent GC (commit: 66e9c45) (details / githubweb)
  819. AArch64: Enable Vectorization (commit: 27bd967) (details / githubweb)
  820. Remove link to obsolete compressed pointers build (commit: c7270ba) (details / githubweb)
  821. Remove obsolete long parm value profiling code (commit: 4d14598) (details / githubweb)
  822. Get real MacOS product version if in compability mode (commit: 87fba64) (details / githubweb)
  823. Invalidate parmInfo for DLT compiles (commit: 6374ead) (details / githubweb)
  824. AArch64: Assembly helper for arraycopy (commit: 9ed8462) (details / githubweb)
  825. AArch64: Add TR_Debug::printARM64ArgumentsFlush (commit: dd636ba) (details / githubweb)
  826. Simplify the logic for identifying minimum free size for sweeping (commit: 81bcea3) (details / githubweb)
  827. Remove atoe_gets() since gets() is insecure and deprecated (commit: 097a80a) (details / githubweb)
  828. Version HCR guards even if they are loop transfer candidates (commit: f54d201) (details / githubweb)
  829. AArch64: Code cleanup (commit: 30b00ab) (details / githubweb)
  830. AArch64: Use xzr register for storing zero (commit: 96d3cdf) (details / githubweb)
  831. Add a new verbose option for JITServer (commit: 90f845c) (details / githubweb)
  832. Fix -Wenum-compare (commit: bd2c683) (details / githubweb)
  833. Disable -Winvalid-offsetof in OMROptions and FEBase.cpp (commit: 5521972) (details / githubweb)
  834. Fix CCN5216 (commit: a544b0f) (details / githubweb)
  835. Fix CCN6101 (commit: e3150dc) (details / githubweb)
  836. Fix CCN6404 (commit: 75ef1cc) (details / githubweb)
  837. Add compilePortableCode query (commit: 3b2f598) (details / githubweb)
  838. Share common logic in SweepHeapSectioning base class (commit: 6ffedb9) (details / githubweb)
  839. Fix CCN8924 (commit: 8cc9ed4) (details / githubweb)
  840. Fix CCN5562 (commit: 08d39e6) (details / githubweb)
  841. Don't use once read symbol heuristics in UseDef at warm (commit: 66d9bde) (details / githubweb)
  842. Define int3 and ud2 instructions for breakpoints and invalid opcodes (commit: dda2fa5) (details / githubweb)
  843. Replace TR::InstOpCode::bad with int3 or ud2 instruction (commit: 74d9abc) (details / githubweb)
  844. Refactoring FPTreeEvaluator in process of removing x87 support. (commit: 3e0c2be) (details / githubweb)
  845. Refactor float/double to long conversion on x86 to use SSE instead of x87 instructions (commit: b383e11) (details / githubweb)
  846. Remove unused x87 code from FPTreeEvaluator (commit: f306fad) (details / githubweb)
  847. Modify f2l conversion to use x87 intructions with pre-encoded registers (commit: f222cc8) (details / githubweb)
  848. Remove unused f2i,d2i conversion code (commit: d6e5b72) (details / githubweb)
  849. Remove need for x87 register allocation in fpReturnEvaluator (commit: 23c6eb1) (details / githubweb)
  850. Remove unused branches, fold branches that are always execute (commit: ab12391) (details / githubweb)
  851. AArch64: Use ubfm instruction for shift and mask operation if possible (commit: c0c0bd0) (details / githubweb)
  852. Suspend convlit around inline assembly on z/OS (commit: 6ab9b6d) (details / githubweb)
  853. AArch64: Use add/sub shifted register instruction if possible (commit: 1f9ed3a) (details / githubweb)
  854. AArch64: Reuse src registers in `generateMaddOrSub` if possible (commit: a33823a) (details / githubweb)
  855. AArch64: Enable shifted immediate for add/sub instructions (commit: 72c6a8f) (details / githubweb)
  856. Use getVirtualCallNodeForGuard() during ValuePropagation (commit: b7314a8) (details / githubweb)
  857. Add new core dump tool for OSX (commit: cfed42b) (details / githubweb)
  858. Reduce Scavenger Remember Set Puddle size (commit: acfef7d) (details / githubweb)
  859. Assert that labels are defined when applying label relocations (commit: 43323d2) (details / githubweb)
  860. Improve registerExchange API on Z (commit: 8d35797) (details / githubweb)
  861. AArch64: Use the immediate offset of ldr/str instructions (commit: 27960a0) (details / githubweb)
  862. AArch64: Use negated constant value for add/sub node if it is more concise (commit: 31a3582) (details / githubweb)
  863. Revert "Add new core dump tool for OSX" (commit: 51c9c51) (details / githubweb)
  864. AArch64: Use mov bitmask immediate instruction if possible (commit: 153d75b) (details / githubweb)
  865. Copy node's children early in OMR::Node::copyValidProperties (commit: dfb3cce) (details / githubweb)
  866. Modified Concurrent Scavenger conditions to use compiler optimization (commit: 9d28ed0) (details / githubweb)
  867. Remove self included header (commit: 3eb74bc) (details / githubweb)
  868. Add IfVectorAPI optimizer flag (commit: 79f2da9) (details / githubweb)
  869. Cleanup softmx check and apply softmx to nursery expansion (commit: abea738) (details / githubweb)
  870. Add disableForceInlineAnnotations JIT command line option (commit: 3de8d56) (details / githubweb)
  871. AArch64: Add helpers for interface PIC (commit: 68b4570) (details / githubweb)
  872. RISC-V: fix ctor of S-type instruction to respect preceding instruction (commit: 7ca2d34) (details / githubweb)
  873. AArch64: Implement arraycopyEvaluator() for primitive arraycopy (commit: 479d198) (details / githubweb)
  874. Revert "Cleanup softmx check and apply softmx to nursery expansion" (commit: 73d89ab) (details / githubweb)
  875. AArch64: Implement reference arraycopy (commit: 14d6559) (details / githubweb)
  876. Interpret field offsets in 'block' forms as expressions (commit: 9a92eee) (details / githubweb)
  877. Define compiler string formatting utilities (commit: cc0a9b8) (details / githubweb)
  878. Add -Xjit disableVectorAPIExpansion and traceVectorAPIExpansion options (commit: 6826ce3) (details / githubweb)
  879. Remove the TR_AOT option (commit: c83840b) (details / githubweb)
  880. Remove TR_DisableCompilationThread option (commit: 2446d4e) (details / githubweb)
  881. Fold VFTLoad from object of known fixed class (commit: 1818cb1) (details / githubweb)
  882. Update Copyrights (commit: 75629a8) (details / githubweb)
  883. Reset _defMergedNodes in global VP on every basic block (commit: f79041a) (details / githubweb)
  884. Trim trailing whitespace (commit: 2d4ba07) (details / githubweb)
  885. Fix compiler warnings (commit: 445d19a) (details / githubweb)
  886. Add job to check line-endings (commit: 35a2b5f) (details / githubweb)
  887. Disable transforming VFTLoad to loadaddr on Power for nonSVM AOT (commit: ba6f751) (details / githubweb)
  888. ConcurrentGC Heap/Tenure Expand Fix (commit: 02187e1) (details / githubweb)
  889. Add document on Loop Canonicalizer and Loop Versioner (commit: 641a90a) (details / githubweb)
  890. RISC-V: implement areturn evaluator (commit: c69f117) (details / githubweb)
  891. Fix CCN8924 (commit: ee53df8) (details / githubweb)
  892. Enable warnings as errors in compiler component on S390 (commit: a04804f) (details / githubweb)
  893. Fix CCN3296 (commit: 9309637) (details / githubweb)
  894. Fix ASMA140W (commit: 0563b80) (details / githubweb)
  895. Fix CCN3068 (commit: 859c4bf) (details / githubweb)
  896. Fix CCN3280 (commit: 926386e) (details / githubweb)
  897. Rename LightweightNonReentrantReaderWriterLock to avoid HLASM errors (commit: cc1d056) (details / githubweb)
  898. Treat warnings as errors on z/OS xlC v2.2 (commit: 13463c9) (details / githubweb)
  899. AArch64: Change generation of "mov" instruction in register assignment (commit: bccc42a) (details / githubweb)
  900. Ensure correct instr construction with neg imm using AIX Assembler (commit: 1cccf1b) (details / githubweb)
  901. Cache known object info on TR::Nodes (commit: c7cb082) (details / githubweb)
  902. Fix GC scavengerScanOrdering Not Initialized Correctly (commit: 266d49d) (details / githubweb)
  903. Add symbol for J9JNIMethodID.vtableIndex field (commit: 61f1845) (details / githubweb)
  904. Prevent compacting NULLCHKs into computed call trees (commit: 2805e95) (details / githubweb)
  905. Remove redundant code in CompactNullChecks implementation (commit: a8267dd) (details / githubweb)
  906. Disable verifyGlobalIndices() (commit: 8efff88) (details / githubweb)
  907. Add setter for TR::Options::_bigCalleeScorchingOptThreshold (commit: 76338d7) (details / githubweb)
  908. Define nonNullableArrayNullStoreCheck non-helper symbol (commit: 0175216) (details / githubweb)
  909. AArch64: Add relocation record for second child of ifacmpeq/ifacmpne (commit: 347c244) (details / githubweb)
  910. Move timestamps in `ScavengerStats` to `Collector` (commit: faac724) (details / githubweb)
  911. Enable lxvh8x instruction for PPC (commit: c3e28ce) (details / githubweb)
  912. Check whether relocations are needed for debug counters (commit: cee45b6) (details / githubweb)
  913. Fix unreadable memory segments when writing core (commit: d064ed6) (details / githubweb)
  914. Fix IEW2646W (commit: 01fa595) (details / githubweb)
  915. Disable Internal Pointers for PPC under OptServer (commit: af82460) (details / githubweb)
  916. Handle hasVectorAPI in Inliner and Optimizer (commit: e2a5864) (details / githubweb)
  917. AArch64: Fix mulConstant32/64 to use correct instrutions (commit: 9422643) (details / githubweb)
  918. Cleanup strictfp as all fp operations are now strict (commit: 8af357c) (details / githubweb)
  919. Enable code coverage setting (commit: 1575de8) (details / githubweb)
  920. Avoid symbol reference sharing for dummy resolved methods (commit: a0db673) (details / githubweb)
  921. Improve non-overridden guard optimization in globalVP (commit: c31dd09) (details / githubweb)
  922. CMake: Fix compile flags on omrgc_tracegen (commit: 92d97a4) (details / githubweb)
  923. AArch64: Consider snippets size when aborting compilation of huge methods (commit: eab73c7) (details / githubweb)
  924. Remove unused constants from the inliner (commit: 4d0ca6e) (details / githubweb)
  925. Use TR_ASSERT_FATAL for TR::MemorySegment asserts (commit: 52016df) (details / githubweb)
  926. Reintroduce 'Cleanup softmx check and apply softmx to nursery expansion' (commit: 7a3001b) (details / githubweb)
  927. Fix MPAOL inconsist issue between freeBytes and freeList (commit: f481a5d) (details / githubweb)
  928. AArch64: Call redoTrampolineReservationIfNecessary() event if label is not null (commit: 06bf6db) (details / githubweb)
  929. Consolidate binary encoding api for VRR-g,h,i (commit: 0ec3e3d) (details / githubweb)
  930. Adding Concurrent Mark timing stats in ConcurrentPhaseStatsBase, and additional flags for heap resizing (commit: b6dbaee) (details / githubweb)
  931. Add documentation on Loop Specializer (commit: c545174) (details / githubweb)
  932. Add document on reading compilation log (commit: 9c5fd3b) (details / githubweb)
  933. AArch64: Block registers in regdeps when assigning register for branch instructions (commit: aac1e0a) (details / githubweb)
  934. AArch64: Correctly handle ificmpeq/ificmpne nodes with many global registers (commit: 05ff62a) (details / githubweb)
  935. Add an unresolved check for mapOpCode() P10 prefix-instr mapping (commit: df2f617) (details / githubweb)
  936. Restrict rotate instruction optimization for land nodes (commit: 83b9348) (details / githubweb)
  937. Prevent a SOF in TR_InductionVariableAnalysis::getEntryValue() (commit: aaa00fc) (details / githubweb)
  938. Follow up to #5825 (commit: 52c3841) (details / githubweb)
  939. Allow core dump on OSX to change directories (commit: d61d967) (details / githubweb)
  940. AArch64: Adding backward arraycopy implementation (commit: 6f2a896) (details / githubweb)
  941. AArch64: Implement ilbit/llbit evaluators (commit: 8c150fb) (details / githubweb)
  942. Correct references to omrosdump.c (commit: ff13612) (details / githubweb)
  943. Define symbol for new jitAcmpneHelper (commit: 8cf034e) (details / githubweb)
  944. AArch64: Remove a suffix of a double constant (commit: b8b936b) (details / githubweb)
  945. AArch64: Adding additional arraycopy helper entries (commit: 8e294dc) (details / githubweb)
  946. New field TLHRemainderCount in CopyForwardStatsCore (commit: fdb29c5) (details / githubweb)
  947. Split _options and _optionString in OptionSet into separate fields (commit: 1aad2a6) (details / githubweb)
  948. Remove dummy SimpleRegex (commit: bae713b) (details / githubweb)
  949. Fix core file not generating on OSX (commit: 5891fb4) (details / githubweb)
  950. Fix uses of BPX4ENV (commit: 05e5965) (details / githubweb)
  951. Consider guard or instanceof as escape point in Field Privatizer (commit: c51edad) (details / githubweb)
  952. Remove SupportedForPRE from instanceof for Field Privatizer bug (commit: 94a7471) (details / githubweb)
  953. Consider comparisons with null to avoid invalid field privatization (commit: f9c32ab) (details / githubweb)
  954. AArch64: Change symbol/function declarations in .spp files (commit: e46f68a) (details / githubweb)
  955. Move arm64asmdefs.inc to runtime directory (commit: 16964b6) (details / githubweb)
  956. Define <objectInequalityComparison> non-helper (commit: 995bc2a) (details / githubweb)
  957. Handle aliasing of <objectInequalityComparisonSymbol> non-helper (commit: 5ea759c) (details / githubweb)
  958. Add nonNullableArrayNullStoreCheck to _commonNonHelperSymbolNames (commit: 6e2ab86) (details / githubweb)
  959. Define TR_jitLookupDynamic[Public]InterfaceMethod JIT helpers (commit: 31a422d) (details / githubweb)
  960. Add new OptimizationPlan flag called DisableEDO (commit: c3dc8a4) (details / githubweb)
  961. Extract type-intersect-location logic from VPClassType intersection (commit: 6be9456) (details / githubweb)
  962. Use a more specific implied location for intersection in VP (commit: 85d2e95) (details / githubweb)
  963. Avoid combining a regular type bound with a ClassObject location in VP (commit: d4ba4d4) (details / githubweb)
  964. Remove redundant definition of TR_acmpHelper (commit: 4832e6f) (details / githubweb)
  965. Remove non-reference members in OMROption.hpp (commit: 6af0e7d) (details / githubweb)
  966. Remove 'assumeStrictFP' JIT option (commit: 3baf264) (details / githubweb)
  967. Add 'Q' prefix handling (commit: 6c39a43) (details / githubweb)
  968. AArch64: Add convenience functions to generate ubfiz/ubfx instructions (commit: 3cb8aa1) (details / githubweb)
  969. Add support for AArch64 macOS (commit: 59b030d) (details / githubweb)
  970. Use newer Ubuntu VMs for Azure pipeline jobs (commit: ed1fe42) (details / githubweb)
  971. Remove useless OMR_THR_TRACING configuration option (commit: 051232d) (details / githubweb)
  972. Add classNameToSignature to ClassEnv (commit: cbf479d) (details / githubweb)
  973. AArch64 macOS: Implement omrsignal_context.c (commit: 229496b) (details / githubweb)
  974. Replace classNameToSignature with the define in ClassEnv (commit: 90d0dc0) (details / githubweb)
  975. Remove classNameToSignature (commit: 37c92a2) (details / githubweb)
  976. Add build assert for OpenJ9 specific file needing refactoring (commit: 9aa824c) (details / githubweb)
  977. Update github URLs for OpenJ9 (commit: dbb4388) (details / githubweb)
  978. CMake: fix /safeseh flag (commit: a80b811) (details / githubweb)
  979. AArch64: Stop using placeholder register for arraycopy (commit: b91736d) (details / githubweb)
  980. AArch64: Enable GCR Patching (commit: e698c35) (details / githubweb)
  981. AArch64: Implement Patchable GCRs (commit: 12820d2) (details / githubweb)
  982. AArch64: Add a method to kill placeholder registers in registrer dependency (commit: 54a8a2d) (details / githubweb)
  983. Remove unused LabelSymbol nullCompilationId (commit: a54f109) (details / githubweb)
  984. Cleaning for OMRPORT_CPU_BOUND (commit: 2fc665e) (details / githubweb)
  985. Port library startup should not return -1 (commit: a97d723) (details / githubweb)
  986. ConcurrentGC Refactoring & SATB Tuning Methods (commit: 3d87347) (details / githubweb)
  987. AArch64: Call decReferenceCount() for aladd node (commit: 5d0b3c7) (details / githubweb)
  988. Fix LabelSymbol constructor to always require a CodeGenerator (commit: 735fa5a) (details / githubweb)
  989. Add CodeGenerator parm to LabelSymbol::isPatchBarrier() (commit: 771d2c4) (details / githubweb)
  990. Add a new symbol flag to mark addresses within method bounds (commit: f797475) (details / githubweb)
  991. Non-functional Core SATB Changes (commit: 7227166) (details / githubweb)
  992. Ensure that created log files' names start with the specified name (commit: 1a1e980) (details / githubweb)
  993. Replace uses of sprintf() in OMROptions.cpp (commit: 6b31d7e) (details / githubweb)
  994. Implement vadd for types ShortVector and ByteVector of size 128 (commit: 49d98ce) (details / githubweb)
  995. Define getTRPID(char*) for any downstream project that calls it (commit: ff18c36) (details / githubweb)
  996. Improve port library startup failure return codes (commit: ecab1d4) (details / githubweb)
  997. Call perror() when SIGSEM_INIT fails in port library startup (commit: 616c339) (details / githubweb)
  998. Implement vsub for types ShortVector and ByteVector of size 128 (commit: c91ca47) (details / githubweb)
  999. Define TR_VerboseLog::CriticalSection as a vlog RAII lock guard (commit: 38d242b) (details / githubweb)
  1000. Replace vlogAcquire()/vlogRelease() pairs with CriticalSection (commit: 04bcb60) (details / githubweb)
  1001. Remove obsolete overloading of ArrayStoreCHK (commit: 232e20e) (details / githubweb)
  1002. cmake : don't ignore -DOMR_WARNINGS_AS_ERRORS=OFF (commit: 951d8c1) (details / githubweb)
  1003. Fix potential NULL pointer use (commit: c4c8f3d) (details / githubweb)
  1004. On OSX incorporate nano time in wakeUpASyncReporter sem name (commit: be3e588) (details / githubweb)
  1005. Delete getTRPID(char*) in favour of getTRPID(char*, size_t) (commit: 7c49955) (details / githubweb)
  1006. AArch64: Support TR_ConstantPool relocation in Constant Data Snippet (commit: 9853f81) (details / githubweb)
  1007. Prevent OSR transitions from failed guards (commit: 8a06709) (details / githubweb)
  1008. Do not rematerialize register for class pointer or method pointer (commit: c6a8248) (details / githubweb)
  1009. Change vmul for IntVectors to use single vmuluwm instruction (commit: 08ac8e9) (details / githubweb)
  1010. Implement vmul for type ShortVector of size 128 (commit: 5f7c29a) (details / githubweb)
  1011. Implement vmul for type ByteVector of size 128 (commit: 844927e) (details / githubweb)
  1012. Add binary encoder unit tests for vmladduhm, vmuleub, and vmuloub (commit: 2d6604f) (details / githubweb)
  1013. Optimize arrays with stable elements (commit: 447964f) (details / githubweb)
  1014. Core (Standard) SATB Routines (commit: 7c412d8) (details / githubweb)
  1015. Add OS detection for Windows 11 and Server 2022 (commit: 5f4fee6) (details / githubweb)
  1016. Remove VP optimization for obsolete TreeMap method (commit: 24984c0) (details / githubweb)
  1017. AArch64: Add support for Int32 and Int64 in vnegEvaluator (commit: ce8035a) (details / githubweb)
  1018. Add findOrFabricateFlattenedArrayElementFieldShadowSymbol (commit: 2ed16c8) (details / githubweb)
  1019. AArch64: Improve MemoryReference class for array access (commit: 74f8db1) (details / githubweb)
  1020. Proper Overflow Handling For SATB (commit: a3a5d1b) (details / githubweb)
  1021. Implement vmul for LongVectors (commit: 132b76b) (details / githubweb)
  1022. Add binary encoder unit tests for vmulld, vmuleuw, vmulouw, vrld, and vsld (commit: dc75a23) (details / githubweb)
  1023. Minor cleanup of PRE code (commit: f6ffd12) (details / githubweb)
  1024. AArch64: Provide factory methods for MemoryReference objects (commit: 74ad991) (details / githubweb)

Started by user Joe deKoning

This run spent:

  • 1 min 57 sec waiting;
  • 1 min 56 sec build duration;
  • 3 min 53 sec total from scheduled to completion.
Revision: 0265ff2e6d49cb8f446bb5c5fd60b0c0c45c18c3
Repository: https://github.com/eclipse/omr.git
  • origin/master